• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.42 no.5
• /
• pp.1-8
• /
• 2005

SPEC CPU2000 is an widely used benchmark program, both in industry and in academy, for measuring compute-intensive performance of computer systems with various architectures. However, there has been little effort to investigate its characteristics with respect to hardware components. This paper presents the performance scalability of SPEC CPU2000 benchmark over CPU clock speed. For an Intel x86-based system running at various clock speed, we measure the performance of SPEC CPU2000 benchmark, and analyze the characteristic of SPEC CPU2000 in a system aspect. In the experiment, we found that the overall performance of SPEC CPU2000 increases monotonically and linearly as the CPU clock speed increases and that the scale efficiencies of SPEC CPU2000 component benchmarks are quite evenly distributed.

• Proceedings of the IEEK Conference
• /
• 2003.07d
• /
• pp.1351-1354
• /
• 2003

본 논문에서는 시스템 성능 향상에 상대적으로 많은 영향을 미치는 CPU 주파수 속도의 변화에 따른 SPEC CPU2000 벤치마크 프로그램의 성능의 변화를 고찰한다. x86 기반의 단일 프로세서 시스템에서 서로 다른 주파수의 CPU를 사용하여 SPEC CPU2000 벤치마크 프로그램의 성능을 측정함으로써 SPEC CPU2000벤치마크 프로그램의 특성을 시스템 적 측면에서 해석하였다. 실험을 통하여 SPEC CPU2000 벤치마크 프로그램의 성능은 CPU 주파수 속도의 변화를 유연하게 반영할 수 있도록 그 의존도가 고르게 분포되어 있음을 알 수 있다.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.15 no.2
• /
• pp.137-143
• /
• 2015

During the past 30 years, DRAM has been used for the reasons of economic efficiency of the production. Recently, PRAM has been emerged to overcome the shortcomings of DRAM. In this paper, we propose a technique that can reduce energy consumption by use of a narrow values to the write operation of PRAM. For this purpose, we describe the data compression method using a narrow value and the architecture of PRAM, We also experiment under the Simplescalar 3.0e simulator and SPEC CPU2000 benchmark environments. According to the experiments, the data hit rate of PRAM was increased by 39.4% to 67.7% and energy consumption was reduced by 9.2%. In order to use the proposed technique, it requires 3.12% of space overhead per word, and some additional hardware modules.

• Journal of KIISE:Computer Systems and Theory
• /
• v.33 no.3
• /
• pp.178-192
• /
• 2006

The buffer overflow attack is the single most dominant and lethal form of security exploits as evidenced by recent worm outbreaks such as Code Red and SQL Stammer. In this paper, we propose microarchitectural techniques that can detect and recover from such malicious code attacks. The idea is that the buffer overflow attacks usually exhibit abnormal behaviors in the system. This kind of unusual signs can be easily detected by checking the safety of memory references at runtime, avoiding the potential data or control corruptions made by such attacks. Both the hardware cost and the performance penalty of enforcing the safety guards are negligible. In addition, we propose a more aggressive technique called corruption recovery buffer (CRB), which can further increase the level of security. Combined with the safety guards, the CRB can be used to save suspicious writes made by an attack and can restore the original architecture state before the attack. By performing detailed execution-driven simulations on the programs selected from SPEC CPU2000 benchmark, we evaluate the effectiveness of the proposed microarchitectural techniques. Experimental data shows that enforcing a single safety guard can reduce the number of system failures substantially by protecting the stack against return address corruptions made by the attacks. Furthermore, a small 1KB CRB can nullify additional data corruptions made by stack smashing attacks with only less than 2% performance penalty.

• Journal of Computing Science and Engineering
• /
• v.9 no.1
• /
• pp.20-28
• /
• 2015

General purpose computing applications have not yet been thoroughly explored in procedure level speculation, especially in the light-weighted profiling way. This paper proposes a light-weighted profiling mechanism to analyze speculative parallelism characterization in several classic general purpose computing applications from SPEC CPU2000 benchmark. By comparing the key performance factors in loop and procedure-level speculation, it includes new findings on the behaviors of loop and procedure-level parallelism under these applications. The experimental results are as follows. The best gzip application can only achieve a 2.4X speedup in loop level speculation, while the best mcf application can achieve almost 3.5X speedup in procedure level. It proves that our light-weighted profiling method is also effective. It is found that between the loop-level and procedure-level TLS, the latter is better on several cases, which is against the conventional perception. It is especially shown in the applications where their 'hot' procedure body is concluded as 'hot' loops.