• Journal of Korea Society of Industrial Information Systems
• /
• v.18 no.2
• /
• pp.1-12
• /
• 2013

Information Security System is implemented in software, hardware and FPGA device. Implementation of S/W provides high flexibility about various information security algorithm, but it has very vulnerable aspect of speed, power, safety, and performing ASIC is really excellent aspect of speed and power but don't support various security platform because of feature's realization. To improve conflict of these problems, implementation of recent FPGA device is really performed. The goal of this thesis is to design and develop a FPGA hardware accelerator for information security system. It performs as AES, SHA-256 and ECC and is controlled by the Integrated Interface. Furthermore, since the proposed Security Information System can satisfy various requirements and some constraints, it can be applied to numerous information security applications from low-cost applications and high-speed communication systems.

• Journal of Satellite, Information and Communications
• /
• v.10 no.3
• /
• pp.114-120
• /
• 2015

In this paper, we show the design requirements of the cryptographic module and its security algorithm designed to prevent the exposure of the command signal applied to Flight Termination System. The cryptographic module consists of two separate devices that are Command Insertion Device and Command Generation Device. The cryptographic module designed to meet the 3 principles(Confidentiality, Integrity and Availability) for the information security. AES-256 block encryption algorithm and SHA-256 Hash function were applied to the encrypted symmetric key encryption method. The proposed cryptographic module is expected to contribute to the security and reliability of the Flight Termination System for Space Launch Vehicle.

• Journal of Information Processing Systems
• /
• v.12 no.2
• /
• pp.310-321
• /
• 2016

TCS_SHA-3 is a family of four cryptographic hash functions that are covered by a United States patent (US 2009/0262925). The digest sizes are 224, 256, 384 and 512 bits. The hash functions use bijective functions in place of the standard compression functions. In this paper we describe first and second preimage attacks on the full hash functions. The second preimage attack requires negligible time and the first preimage attack requires $O(2^{36})$ time. In addition to these attacks, we also present a negligible time second preimage attack on a strengthened variant of the TCS_SHA-3. All the attacks have negligible memory requirements. To the best of our knowledge, there is no prior cryptanalysis of any member of the TCS_SHA-3 family in the literature.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.15 no.1
• /
• pp.57-66
• /
• 2005

SHACAL-2 is a 256-bit block cipher with various key sizes based on the hash function SHA-2. Recently, it was recommended as one of the NESSIE selections. This paper presents differential-linear type attacks on SHACAL-2 with 512-bit keys up to 32 out of its 64 rounds. Our 32-round attack on the 512-bit keys variants is the best efficient attack on this cipher in published literatures.

• Journal of Information Processing Systems
• /
• v.5 no.4
• /
• pp.187-196
• /
• 2009

This paper presents compact cryptographic hardware architecture suitable for the Mobile Trusted Module (MTM) that requires low-area and low-power characteristics. The built-in cryptographic engine in the MTM is one of the most important circuit blocks and contributes to the performance of the whole platform because it is used as the key primitive supporting digital signature, platform integrity and command authentication. Unlike personal computers, mobile platforms have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore special architecture and design methods for a compact cryptographic hardware module are required. The proposed cryptographic hardware has a chip area of 38K gates for RSA and 12.4K gates for unified SHA-1 and SHA-256 respectively on a 0.25um CMOS process. The current consumption of the proposed cryptographic hardware consumes at most 3.96mA for RSA and 2.16mA for SHA computations under the 25MHz.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.12 no.5
• /
• pp.87-93
• /
• 2002

SHACAL is based on the hash standard SHA-1 used in encryption mode, as a submission to NESSIE. SHACAL uses the XOR, modular addition operation and the functions of bit-by-bit manner. These operations and functions make the differential cryptanalysis difficult, i.e, we hardly find a long differential with high probability. But, we can find short differentials with high probability. Using this fact, we discuss the security of SHACAL against the amplified boomerang attack. We find a 36-step boomerang-distinguisher and present attacks on reduced-round SHACAL with various key sizes. We can attack 39-step with 256-bit key, and 47-step with 512-bit key.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.15 no.3
• /
• pp.115-126
• /
• 2005

SHACAL-2 is a 256-bit block cipher with up to 512 bits of key length based on the hash function SHA-2. It was submitted to the the NESSIE project and was recommended as one of the NESSIE selections. In this paper, we present two types of related-key attacks called the related-key differential-(non)linear and the related-key rectangle attacks, and we discuss the security of SHACAL-2 against these two types of attacks. Using the related-key differential-nonlinear attack, we can break SHACAL-2 with 512-bit keys up to 35 out of its 64 rounds, and using the related-key rectangle attack, we can break SHACAL-2 with 512-bit keys up to 37 rounds.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2017.11a
• /
• pp.360-362
• /
• 2017

올해 초, 구글(Google)이 SHA-1의 충돌 현상을 입증했다. 이것은 모든 타 암호 알고리즘 역시 안전할 수 없다는 것을 뜻하며, 향후 SHA-256을 사용하는 비트코인도 취약해질 수 있음을 의미한다. 이유인즉슨, 비트코인에서 사용되는 암호 및 해시 알고리즘은 답을 찾기 위해 상당한 시간이 소요되지만, 양자 컴퓨터의 큐비트를 바탕으로 하는 연산처리 능력은 그 시간을 대폭 감소시킬 수 있기 때문이다. 본 논문에서는 이와 같은 양자 컴퓨터가 비트코인에 얼마나 위협적일 수 있는지와 더불어 양자 컴퓨터 출현에 대비하고자 등장한 새로운 암호 화폐인 Byteball 및 QRL코인을 살펴보고자 한다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.39B no.4
• /
• pp.242-250
• /
• 2014

Conventional researches of standard tool validating cryptographic algorithm have been studied for the internet environment, for the mobile internet. It is important to develop the validation tool for establishment of interoperability and convenience of users in the information systems. Therefore, this paper presents the validation tool of Elliptic Curve Cryptography algorithm that can test if following X9.62 technology standard specification. The validation tool can be applied all information securities using DES, SEED, AES, SHA-1/256/384/512, RSA-OAEP V2.0, V2.1, ECDSA, ECKCDSA, ECDH, etc. Moreover, we can enhance the precision of validation through several experiments and perform the validation tool in the online environment.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.15 no.1
• /
• pp.199-204
• /
• 2020

With the development of IT. convergence systems are applied and operated in many different fields. A representative field among them is medical service, which develops in diverse types in combination with nano-technology and bio technology. However, there is a lack of technical innovation in terms of medical data operation and management. For example, data and documents are saved and integrated separately depending on their forms when electronic health records or data like SAM files are transmitted or kept. In other cases, such records and data are still kept after being recorded in paper. This study tries to design and implement the EMR system that makes it possible to capsulize forms of data and documents and to digitalize documents in work process as they are in terms of operation and storage. The system is expected to support efficient operation of electronic documents in the aspects of work and management.