• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.368-371
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• 1999

In this paper, we propose a neural network processor architecture with on-chip learning and with reconfigurability according to the data dependencies of the algorithm applied. For the neural network model applied, the proposed architecture can be configured into either SIMD or SRA(Systolic Ring Array) without my changing of on-chip configuration so as to obtain a high throughput. However, changing of system configuration can be controlled by user program. To process activation function, which needs amount of cycles to get its value, we design it by using PWL(Piece-Wise Linear) function approximation method. This unit has only single latency and the processing ability of non-linear function such as sigmoid gaussian function etc. And we verified the processing mechanism with EBP(Error Back-Propagation) model.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.3
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• pp.1-10
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• 1995

In this paper, a fault-tolerant Mini-MAP system with high reliability is proposed. For fault-tolerance, the LLC sublayer, MAC sublayer, and physical layer of the Mini-MAP system are dualized. The detection of faults, the replacement of the failed network, and the management of the network are three major functions required for the dualization, and they are performed by ESM(Error Supervisory Machine), EMM(Error Management Machine), and NMM(Network Management Machine) of the proposed fault-tolerant Mini-MAP system, respectively. The ring maintenance function of the MAC sublayer is used for the detection of the faults. In the proposed fault-tolerant Mini-MAP system, the data are received from both of the dualized networks and transmitted to the selected one of the two. We analyze the reliability and the MTTF(Mean Time To Failure) of the proposed fault-tolerant Mini-MAP system and show that it has better performance compared to a general Mini-MAP system.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2001.06a
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• pp.81-84
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• 2001

A signal path control switch has been designed and implemented with AT&T 0.5${\mu}{\textrm}{m}$ CMOS ORCA FPGA. This device controls the path of digital signals in SDH-based transmission system. The proposed switch is suitable for self-healing operation which protects against transmission network failure. The self-healing operation of the switch is effectively done by the reconfigurable information stored in the registers of the switch. This device consists of eight subparts such west-east transmitting parts, west-east receiving parts, add-drop control parts, AIS control Part, and CPU interface part. The device is capable to a ring network as well as a linear network.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.11a
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• pp.363-370
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• 2002

A substrate network model characterizing substrate effect of submicron MOS transistors for RF operation and its parameter extraction with physically meaningful values are presented. The proposed substrate network model includes a single resistance and inductance originated from ring-type substrate contacts around active devices. Model parameters are extracted from S-parameter data measured from common-bulk configured MOS transistors with floating gate and use where needed with out any optimization. The proposed modeling technique has been applied to various-sized MOS transistors. Excellent agreement the measurement data and the simulation results using extracted substrate network model up to 30㎓

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.157-160
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• 1988

This paper describes the development of the Interfacing unit between PSTN and interphone network. The designed and realised system detects the ring signal from PSTN and makes off-hook condition when it is detected. Then the caller can hear the response tone from the unit and the tones of the interphone network condition. The developed system receives the interphone number to which the caller wants to connect by MFC tones and drives Interphone switch matrix. Thus, a call is connected to the interphone user directly. The caller may press the interphone number up to 10 digits and the last two of which are recognized as valid ones. The caller must press the first digit within 20 seconds after system response.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.126-131
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• 2002

In constructing a superhigh communications network, investment in broadband of local loop is the most necessary. In this paper, it is performed to extract an optimum local loop by means of a comparative study after investigation and analysis of each construction structure of local loop. This paper is presented the way of construction of an economically optimum superhigh network by measurement in various circumstances, comparison and analysis of cost per node and star and ring in topology for constructing an optimum superhigh local loop.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.11
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• pp.1206-1218
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• 1992

Token ring systems which control to switch the data stream of networks by passing the token have been widely used to medium access controls in many ring or bus topology LANs. The system could be modeled for analysis as single-server-multi-queue system of the cyclic service method. These concepts could be expanded to multi-token ring systems interconnected with single ring consisting of bridges implemented simply to be stored and transmitted. In the proposal for the performance analysis of the interconnected token ring system, in has been assumed M/G/1 queueing model that frame arrivals are the Poisson process at each station queue and frame sizes are independently and identically distributed. And the average time delays were analyzed mathematically for arbitrary frame transferred from source station to destination area. The time delay of the frame transmission could be explained as the sum of the average time which the token passed from arbitrary position to source station, such as the waiting time in the source station transferring the previous arrival frames, and the propagation time from source station to interdestinated point. These delays were given as the sum of the duration from inner and outer bridge queues, the time delays from inner and outer bridge queues, and the time from outer bridge queue to destination station. These results were investigated by varing parameters effected to total time delays. In the results, those factors to be effected to dominant the total time delays were increased were in the cases of the high arrival rates and the high ration of destination of the other outerring. The system were shown the time delays increased exponentially in spite of the priority service policy. In order to decreasing the number of outerrings and increasing the number of nodes in backbone relatively, so the systems could be decreased the total delay in the interconnected token ring system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.5B
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• pp.956-965
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• 2000

In this paper, we propose an efficient traffic grooming algorithm to minimize to number of SONET ADMs which is the dominant cost of system in high speed optical ring networks. It is an optimal traffic grooming algorithm to be applied to both unidirectional ring and bi-directional ring under both uniform traffic and nonuniform traffic. The proposed traffic grooming algorithm consists of two subalgorithms : one is the algorithm to construct full connection-rings as many as possible to minimize gaps by cutting the connections and using redirection method, and the other is the algorithm to groom connection-rings into a wavelength to maximize the number of shared nodes. The simulation results show that the proposed algorithm is superior to conventional algorithm under various network conditions.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.436-441
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• 2008

In this paper, we derived the Y-parameter of the recently reported Balun-BPF with a dual mode ring resonator by using the network analysis method. Using the derived Y-parameter we verified that the Balun-BPF structure satisfy the balun conditions. In order to design the Balun-BPF with arbitrary characteristics using the standard BPF design method with ease we derived the immittance slope parameters of the dual mode ring resonator with a load. The notch frequencies are also predicted. By designing with the proposed equations, simulating with a circuit simulator, fabricated and measured a Balun-BPF we confirmed the validation of the equations. The measured data shows bandwidth of 71 MHz and insertion loss of 0.92 dB at the center frequency of 2.46 GHz. It shows the phase imbalance of $174{\sim}181$ degree and the magnitude imbalance within 0.5 dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.11
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• pp.2526-2533
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• 2015

In this paper, a design method for a compact dual-band coplanar waveguide-fed slot antenna using SRR(split-ring resonator) conductor is studied. The SRR conductor is loaded inside a rectangular slot of the proposed antenna for dual-band operation. When the SRR conductor is inserted into the slot, the original rectangular slot is divided into a rectangular loop region and a rectangular slot region, and frequency bands are created by the loop and slot, separately. A prototype of the proposed dual-band slot antenna operating at 2.45 GHz WLAN band and 3.40-5.35 GHz band is fabricated on an FR4 substrate with a dimension of 30 mm by 30 mm. Experiment results show that the antenna has a desired impedance characteristic with a frequency band of 2.38-2.51 GHz and 3.32-5.38 GHz for a voltage standing wave < 2, and measured gain is 1.7 dBi at 2.45 GHz, and it ranges 2.4-3.2 dBi in the second band.