• Title/Summary/Keyword: Rijndael

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A Study on the MDS performance improvement for Twofish cryptographic algorithm speed-up (Twofish 암호알고리즘의 처리속도 향상을 위한 MDS 성능개선에 관한 연구)

  • Lee, Seon Keun;Kim, Hwan Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.10 s.340
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    • pp.35-38
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    • 2005
  • Treatise that see designed MDS block newly algorithm itself is concise and improve the speed of Twofish cryptographic algorithm that easy of implement is good but the processing speed has slow shortcoming than Rijndael cryptographic algorithm Problem of speed decline by a bottle-neck phenomenon of processing process existed as block that designed MDS block occupies critical path of Twofish cryptographic system Multiplication arithmetic that is used by operator in this MDS convex using LUT arithmetic and modulo-2 arithmetic speed decline and a bottle-neck phenomenon about MDS itself remove. Twofish cryptographic system including MDS block designed newly by these result confirmed that bing elevation of the processing speed about $10\%$ than existing Twofish cryptographic system.

Design of modified Feistel structure for high-capacity and high speed achievement (대용량 고속화 수행을 위한 변형된 Feistel 구조 설계에 관한 연구)

  • Lee Seon-Keun;Jung Woo-Yeol
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.3 s.35
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    • pp.183-188
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    • 2005
  • Parallel processing in block cryptographic algorithm is difficult, because Feistel structure that is basis structure of block cryptographic algorithm is sequential processing structure. Therefore this paper changes these sequential processing structure and Feistel structure made parallel processing to be possible. This paper that apply this modified structure designed DES that have parallel Feistel structure. Proposed parallel Feistel structure could prove greatly block cryptographic algorithm's performance such as DES and so on that could not but have trade-off relation the data processing speed and data security interval because block cryptographic algorithm can not use pipeline method because of itself structural problem. Therefore, modified Feistel structure is going to display more superior security function and processing ability of high speed than now in case apply way that is proposed to SEED, AES's Rijndael, Twofish etc. that apply Feistel structure.

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Formal Verification of AES Encryption Module Using CBMC (CBMC를 이용한 AES 암호화 모듈의 정형 검증)

  • Ahn Young-Jung;Choi Jin-Young
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.11a
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    • pp.97-99
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    • 2005
  • 정보보호 제품의 주요한 역할을 담당하는 암호 모듈의 구현 무결성을 보증하기 위해 많은 연구가 활발히 이루어지고 있다. 하지만 기존의 일반적인 테스팅 방법으로는 구현 무결성에 대해 신뢰하지 못한다. 본 논문에서는 NIST (the US National Institute of Science and Technology)에서 AES(Advanced Encryption Standard)로 제정된 Rijndael 블록암호 모듈을 Verilog로 구현하고 CBMC를 이용하여 새로운 방식의 구현 무결성 평가 방법을 제시하고자 한다.

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Chacterization of Small Embedded Programs (소형 임베디드 프로그램의 실행 속도와 특성분석)

  • Chung, Sae-Am;Yi, Jong-Su;Kim, Jun-Seong
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.771-772
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    • 2008
  • In this paper, we analyze the characterization of Mibench, an embedded system benchmark program, using simplescalar simulator. The experimental results show Mibench generally is formed by lots of integer and memory access instructions. Especially, IPC of rijndael decoding is effected by cache size largely, but IPC of CRC32 is few effected by cache size or branch predicting algorithm.

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VLSI Design of AES Cryptographic Processor (AES 암호 프로세서의 VLSI 설계)

  • 정진욱;최병윤;서정욱
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.285-288
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    • 2001
  • In this paper a design of cryptographic coprocessor which implements AES Rijndael algorithm is described. To achieve average throughput of 1 round per 5 clocks, subround pipelined scheme is applied. To apply the coprocessor to various applications, three key sizes such as 128, 192, 256 bits are supported. The cryptographic coprocessor is designed using 0.25${\mu}{\textrm}{m}$ CMOS technology and consists of about 36, 000 gates. Its peak performance is about 512 Mbps encryption or decryption rate under 200 Mhz clock frequency and 128-bit key ECB mode(AES-128ECB).

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Design of the RBC Algorithm using Shared Hardware Architecture (하드웨어 공유 구조를 이용한 RBC 알고리즘의 설계)

  • Park, Hyoung-Keun;Kim, Sun-Youb;Ra, Yu-Chan
    • Proceedings of the KAIS Fall Conference
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    • 2009.05a
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    • pp.624-627
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    • 2009
  • 본 논문에서는 차세대 블록 암호 시스템으로 선정되었으며 미연방정부의 표준으로 제정된 RBC(Rijndael Block Cipher) 알고리즘을 하드웨어로 구현하였다. 구현된 블록 암호 시스템은 임베디드 시스템에 적용이 가능하도록 암호화 블록과 복호화 블록을 따로 설계하지 않고 하드웨어를 공유하여 하나의 블록에서 선택에 따라 암호화와 복호화가 모두 이루어질 수 있도록 설계함으로써 하드웨어의 면적을 최소화하였다.

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The Implementation of the Cryptographic Processor for IPSec (IPSec을 위한 암호 프로세서의 구현)

  • 황재진;최명렬
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.10a
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    • pp.406-408
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    • 2004
  • 인터넷 보안에 대한 중요성이 나날이 증가하고 있으며. 이러한 인터넷 보안 문제의 해결책으로 개발된 IPSec은 IP 계층에서 보안서비스를 제공하기 위하여 AH와 ESP를 사용하여 보안연계(Security Association) 서비스를 제공한다. 본 논문에서는 32-bit 데이터 베이스를 이용하여 새로운 AES로 채택된 Rijndael 암호 알고리즘과 HMAC-SHA-1 인증 알고리즘을 통합시킨 IPSec 암호 프로세서를 구현하였다. Xilinx ISE 5.2i를 사용하여 VHDL로 설계하였고, ModelSim으로 시뮬레이션 검증을 수행하였으며, Xilinx사의 Vertex XCV1000E로 구현하였다. 본 논문에서 구현한 IPSec 암호 프로세서는 WLAN이나 VPN, Firewall등에 응용될 수 있을 것이다.

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The study of AES Decryption Core for FPGA implements. (FPGA를 이용한 AES 복호화 코어 구현에 관한 연구)

  • Kim, Nam-woo;Hur, Chang-Woo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.599-602
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    • 2014
  • FPGA상에 AES 복호화 코어를 FIPS-197사양에 기술된 AES 알고리즘의 복호화부분을 구현하였다. 키값의 길이는 128/192/256비트를 지원하며, 별도의 코어 로직은 FPGA의 6-input lookup table의 이점을 살리도록 설계되었으며, 이결과로 2000개의 lookup table만을 이용하여 256비트 키에서 3Gbps의 처리가 가능하게 되었다. 코어는 난수 및 FIPS-197, SP-800a와 AESAVS사양의 테스트 벡터를 통해서 검증하였다.

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A Modular On-the-fly Round Key Generator for AES Cryptographic Processor (AES 암호 프로세서용 모듈화된 라운드 키 생성기)

  • Choi Byeong-Yoon;Lee Jong-Hyoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.5
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    • pp.1082-1088
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    • 2005
  • Generating fast round key in AES Rijndael algorithm using three key sizes, such as 128, 192, and 256-bit keys is a critical factor to develop high throughput AES processors. In this paper, we propose on-the-fly round key generator which is applicable to the pipelined and non-pipelined AES processor in which cipher and decipher nodes must be implemented on a chip. The proposed round key generator has modular and area-and-time efficient structure implemented with simple connection of two key expander modules, such as key_exp_m and key_exp_s module. The round key generator for non-pipelined AES processor with support of three key lengths and cipher/decipher modes has about 7.8-ns delay time under 0.25um 2.5V CMOS standard cell library and consists of about 17,700 gates.

An Authentication and Key Management Protocol for Secure Data Exchange in EPON MAC Layer (EPON MAC 계층의 안전한 데이터 전송을 위한 인증 및 키관리 프로토콜)

  • Kang, In-kon;Lee, Do-Hoon;Lee, Bong-Ju;Kim, Young-Chon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.1B
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    • pp.1-10
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    • 2003
  • An EPON which is going on standardization in IEEE 802.3ah, is tree topology consists of a OLT and multiple ONU using passive optical components, so this network is susceptible to variable security threats - eavesdropping, masquerading, denial of service and so on. In this paper, we design a security protocol supporting authentication and confidentiality services in MAC layer in order to prevent these security threats and to guarantee secure data exchange The designed security protocol introduce public-key based authentication and key management protocols for efficient key management, and choose Rijndael algorithm, which is recent standard of AES, to provide the confidentiality of EPON Proposed authentication and key management protocols perform authentication and public-key exchange at a time, and are secure protocols using derived common cipher key by exchanging public random number To implement the designed security protocol, we propose the procedures of authentication and public-key exchange, session key update, key recovery. This proposed protocol is verified using unknown session key, forward secrecy, unknown key-share, key-compromise impersonation.