• Title/Summary/Keyword: Retargetable 컴파일러

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Code Generation Techniques for the Optimized Energy Consumption (최적화된 에너지 소비를 위한 코드 생성 기술)

  • Ko, Kwang-Man;So, Kyoung-Young
    • The Journal of the Korea Contents Association
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    • v.8 no.12
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    • pp.63-71
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    • 2008
  • Recently, together with a new advent of embedded processor developed to support specific application area, and it evolution, a new study of software development to support the embedded processor and its commercial use has been revitalized. Specially, In a mobile device that is built-in embedded processor, software management is as important as hardware management for the limited power/energy. In this paper, we suggest that the code generation technique considering the energy dissipation through the verified retargetable compiler backend tool, EXPRESSION. For this goals, we describes the efficient code generation patterns and showed the variable performance results.

A Study on the Pentium Code Generation using Retargetable Code Generation Technique from Bytecode (Bytecode로부터 재목적 코드 생성 기법을 이용한 Pentium 코드 생성에 관한 연구)

  • Jeong, Seong-Ok;Go, Gwang-Man;Lee, Seong-Ju
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.37 no.4
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    • pp.1-8
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    • 2000
  • The massive growth of the internet and the world-wide-web leads us to research the programming languages for the development of applications in heterogeneous, network-wide distributed environments. Java is an object-oriented language for such a environment and the Java programming language environment provides a portable, interpreted, high-performance, simple programming language. Bytecode is an intermediate code for Java language and it enables the development of applications on multiple platform in heterogeneous, distributed networks. But it takes much time to execute Bytecode because of using an interpretation method. In this paper, we design and implement a retargetable code generation system which can be systematically reconfigured to generate code for a variety of distinct target computers. From the system, we realize the code generation system which translates the Bytecode being produced by Java compiler into Pentium target code. We use ACK code generation system to do the work easily.

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Construction of an Automatic Instruction-Set Extension System for Efficient ASIP Design (효율적인 ASIP 설계를 위한 자동 인스트럭션 확장 시스템 구축)

  • Hwang, Deok-Ho;Hwang, Sun-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.1
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    • pp.1-9
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    • 2013
  • This thesis proposes an automatic instruction extension system that utilizes retargetable compiler, based on MDL, to design an ASIP optimized for application. The proposed system uses information gathered from the application program to find all possible expandable instruction candidates. Expandable instruction candidates acquire the realization characteristics through hardware library. The system chooses instruction set and optimizes processor structure satisfying constraints on the bases of hardware characteristics and increase in execution speed. To confirm the efficiency of the proposed system, automatic instruction extension system was performed using various benchmark applications. The proposed system acquired optimized instruction set and processor structure, which are expanded from the commercial version of ARM9TDMI. Experimental results show that number of execution cycle has been reduced by 33.5% when compared to conventional version of ARM9TDMI, while area has been slightly increased.

A Study on the Adapting of the Virtual Machine using Retargetable Techniques (재목적 기술을 이용한 가상기계의 탑재에 관한 연구)

  • Ko Kwang-Man;Yoo Jae-Min
    • Proceedings of the Korean Information Science Society Conference
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    • 2006.06b
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    • pp.409-411
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    • 2006
  • 본 논문에서는 컴파일러 개발 시에 적용되었던 재목적 기술을 응용하여 다양한 플랫폼에 가상기계를 보다 원활히 탑재하기 위한 가상기계의 자동화 탑재 기술을 제안하고 이를 구현한다. 이를 위해, 가상기계를 플랫폼 독립적인 가상기계 핵심(Core) 부분과 플랫폼 의존적인 부분으로 재구성한 후 다음과 같은 세가지 부분을 설계하고 구현한다. 첫째. 플랫폼 의존적인 부분을 정형화된 방법으로 기술할 수 있는 플랫폼 디스크립션을 설계한다. 둘째. 설계된 플랫폼 디스크립션을 입력으로 받아 최적의 플랫폼 정보를 생성할 수 있는 탑재 점보 생성기를 구현한다. 마지막으로 탑재 정보 생성기의 출력과 가상기계의 핵심 부분을 결합하는 가상기계 생성기를 개발한다.

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Retargetable Instruction-Set Simulator for Energy Consumption Monitoring (에너지 소비 모니터링을 위한 재목적 인스트럭션-셋 시뮬레이터)

  • Ko, Kwang-Man
    • Journal of Korea Multimedia Society
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    • v.14 no.3
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    • pp.462-470
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    • 2011
  • Retargetability is typically achieved by providing target machine information, ADL, as input. The ADL are used to specify processor and memory architectures and generate software toolkit including compiler, simulator, etc. Simulator are critical components of the exploration and software design toolkit for the system designer. They can be used to perform diverse tasks such as verifying the functionality and/or timing behavior of the system, and generating quantitative measurements(e.g., power energy consumption) which can be used to aid the design process. In this paper, we generate the energy consumption estimation simulator through ADL. For this goal, firstly, we describes the energy consumption estimation and monitoring informations on the ADL based on EXPRESSION. Secondly, we generate the energy estimation and monitoring simulation library and then constructs the simulator, RenergySim. Lastly, we represent the energy estimations results for MIPS R4000 ADL description. From this subjects, we contribute to the efficient architecture developments and prompt SDK generation through programmable experiments in the field of mobile software development.