• Journal of Electrical Engineering and Technology
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• v.2 no.4
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• pp.525-531
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• 2007

Ni(75 wt.%)-Cr(20 wt.%)-Al(3 wt.%)-Mn(4 wt.%)-Si(1 wt.%) alloy thin films were prepared using the DC magnetron sputtering process by varying the sputtering conditions such as power, pressure, substrate temperature, and post-deposition annealing temperature in order to fabricate a precision thin film resistor. For all the thin film resistors, sheet resistance, temperature coefficient of resistance (TCR), and crystallinity were analyzed and the effects of sputtering conditions on their properties were also investigated. The oxygen content and TCR of Ni-Cr-Al-Mn-Si resistors were decreased by increasing the sputtering pressure. Their sheet resistance, TCR, and crystallinity were enhanced by elevating the substrate temperature. In addition, the annealing of the resistor thin films in air at a temperature higher than $300^{\circ}C$ lead to a remarkable rise in their sheet resistance and TCR. This may be attributed to the improved formation of NiO layer on the surface of the resistor thin film at an elevated temperature.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.7
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• pp.1268-1274
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• 2007

A recently developed methods for the on-site calibration of the voltage transformer (VT) comparator system have been reviewed in the paper. The method utilizes the several traveling standards consisting of the VT, the non-reactive standard resistors, the wide ratio error VT, and the decade resistors. The VT is used for the absolute evaluation of a standard VT belonging to the industry. The non-reactive standard resistor and wide ratio error VT are used for the linearity check of errors in the voltage comparator of the industry. The decade resistors are used for evaluation of a VT burden of the industry.

• Journal of the Korean Mathematical Society
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• v.47 no.6
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• pp.1223-1238
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• 2010

The purpose of this work is to identify the internal structure of the electrical networks with data obtained from only a part of network or the boundary of network. To be precise, it is discussed whether we can identify resistors or electrical conductivities of each link inside networks by the measurement of voltage on the boundary which is induced by a prescribed current on the boundary. As a result, it is shown that the structure of the resistor network can be determined uniquely by only one pair of the data (current, voltage) on the boundary, if the resistors satisfy an appropriate condition. Besides, several useful results about the energy functionals, which means the electrical power, are included.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.609-611
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• 2006

This paper describes a CMOS sub-bandgap reference using Pseudo-Resistors which can be widely used in flash memory, DRAM, ADC and Power management circuits. Bandgap reference circuit operates weak inversion for reducing power consumption and uses Pseudo-Resistors for reducing the chip area, instead of big resistor. It is implemented in 0.35um Standard 1P4M CMOS process. The temperature coefficient is 5ppm/$^{\circ}C$ from $40^{\circ}C$ to $100^{\circ}C$ and minimum power supply voltage is 1.2V The core area is 1177um${\times}$617um. Total current is below 2.8uA and output voltage is 0.598V at $27^{\circ}C$.

• ETRI Journal
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• v.28 no.4
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• pp.486-494
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• 2006

Two current-mode and/or voltage-mode quadrature oscillator circuits each using one fully-differential second-generation current conveyor (FDCCII), two grounded capacitors, and two (or three) grounded resistors are presented. In the proposed circuits, the current-mode quadrature signals have the advantage of high-output impedance. The oscillation conditions and oscillation frequencies are orthogonally (or independently) controllable. The current-mode and voltage-mode quadrature signals can be simultaneously obtained from the second proposed circuit. The use of only grounded capacitors and resistors makes the proposed circuits ideal for integrated circuit implementation. Simulation results are also included.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.1
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• pp.59-62
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• 2017

CNT (carbon nanotube) resistors with low resistance and negative TCR (temperature coefficient of resistance) were fabricated with yarned CNT (carbon nanotube) fibers. The CNT fibers were prepared by yarning CNTs grown on the silicone substrate by CVD (chemical vapor deposition) method. The CNT resistors were fabricated by winding CNT fibers on the surface of ceramic rod. Both metal terminals were connected with the CNT fiber wound on the ceramic rod. We measured electrical resistance and thermal stability with the number of CNT fibers wound. The CNT resistor system shows linearly decreased resistance with the number of CNTs wound on the ceramic rod and saturated at 20 strands. The CNT resistor system has negative TCR between $-1,000{\sim}-2,000ppm/^{\circ}C$ and stable frequency properties under 100 kHz.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.135-139
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• 1996

It is difficult to fabricate precise resistors for the analog integrated circuits using MOS technology. Until now polysilicon resistors were used at the analog integrated circuits, but some deviations of resistance and sensitive variation processes still cause their misactions. In order to improve these misactions, we suggest a CMOS resistor cell which provides precise resistance and excellant linearity. Also we designed the second order active low pass filter using the CMOS resistor cells and verified their superior performances compared to the actual resistors.

• Journal of the Korean Ceramic Society
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• v.43 no.9 s.292
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• pp.558-563
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• 2006

The electrical and dielectric properties of $ZnO-Pr_6O_{11}CoO-Cr_2O_3La_2O_3-based$ nonlinear resistors were investigated at different sintering temperatures in the range of $1230{\sim}1300^{|circ}C$. As the sintering temperature increased, the breakdown voltage decreased from 777.9 to 108.0V/mm, the nonlinear coefficient greatly decreased from 77.0 to 7.1, and the leakage current increased from $0.4{\mu}A\;to\;50.6{\mu}A$. On the other hand, the donor density from $0.90{\times}10^{18}\;to\;2.59{\times}10^{18}/cm^3$ and the barrier height decreased from 1.89 to 0.69 eV with increasing temperature. The dielectric dissipation factor increased from 0.0879 to 0.2839 for the increase of sintering temperature.

• Journal of the Korean Ceramic Society
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• v.30 no.11
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• pp.974-978
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• 1993

Glass viscosity effects on the electrical properties and microstructure of RuO2 based thick film resistors (TFR) using alumina modified lead borosilicate glasses were studied. AT 85$0^{\circ}C$, the glass viscosities were increased from 4.24Pa.s to 51.5Pa.s when the alumina was added from none to 14 weight percent to the standard glass of 63% PbO, 25% B2O3 and 12% SiO2. The resistivities of resistors were generally decreased and the microstructure development was retarded as the viscosity of the glass increased. This is contrary to the generally accepted thought that the low resistivity is due to fast microstructure development kinetics in TFR. Even though the glass viscosity retards the microstructure development kinetics, the overall network formations are favored for higher viscosity of glass, such that the sheet resistivities were decreased as the glass viscosity increased.

• Journal of Electrical Engineering and Technology
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• v.9 no.4
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• pp.1324-1331
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• 2014

This paper proposes a compensation PWM technique for the extension of output voltage ranges in three-phase VSI applications using three shunt resistors. The proposed technique aims to solve the dead zone, which occurs in high modulation indexes. In the dead zone, two phase currents cannot be sampled correctly, so that the three-phase VSI cannot be operated up to the maximum output voltage. The dead zone is analyzed in detail, and the compensation PWM algorithm is developed. The proposed algorithm is verified by numerical analysis and experimental results.