• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 추계학술대회 논문집 학회본부 B
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• pp.603-605
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• 1998

In recent years, chip delay estimation has had an increasingly important impact on overall design technology. The analysis of the timing behavior of an ASIC should be based not only on the delay characteristics of gates and interconnect circuits but also on the interactions between them. This model plays an important role in our CAD system to analyze the ASIC timing characteristics accurately, together with two-dimensional gate delay table model, AWE algorithm and effective capacitance concept. In this paper, we present an efficient algorithm which accounts for series resistance by computing a reduced-order approximation for the driving-point admittance of an RC-tree and an effective capacitance equation that captures the complete waveform response accurately.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1351-1352
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• 2006

In this paper, the impedance properties of degraded thyristor with heat and voltage were presented. As degraded thyristor, 8 thyristors with each other different reverse blocking voltage used. Its impedance and resistance properties were measured from frequency 100Hz to 10MHz applied with bias voltage from 0V to 40V. As a result, at low frequency region, that is, at the frequency 100-10kHz, the abrupt increasement of its capacitance was confirmed. And also, at high frequency region, the capacitance peak move toward low frequency in the region of frequency 4 - 6MHz as degradation of thyristor.

• 한국전기전자재료학회논문지
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• 제24권3호
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• pp.224-228
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• 2011

This research, integratable capacitive relative humidity sensor was produced using polyimide on glass substrate. Also, at the time of upper electrode formation, upper electrode grain size was affected by giving changes to sputtering condition. Through this analyzing electrical characteristics affect from capacitive relative humidity sensor was possible. Capacitance of capacitive relative humidity sensor was 330 pF, linearity of 0.6%FS and it showed less than 3% of low hysterisis. Specially, hysterisis was affected more from interface than interstitial. Also was affected by the grain size which is one of the formation condition of upper electrode.

• Bulletin of the Korean Chemical Society
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• 제10권6호
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• pp.495-500
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• 1989

The ionic conductivity of polycrystalline, glass, and glass-ceramic silicates was measured using two-terminal AC method with blocking electrode over a frequency range of 100 Hz to 100 KHz in the temperature range of $200^{\circ}C$ to $320^{\circ}C$. Analysing the capacitance (C), susceptance (B), impedance (Z), and conductance (G) under the given conditions, an equivalent circuit containing temperature and frequency dependent component is proposed. Higher capacitance could be observed in the low frequency region and on the improved ionic migration conditions i.e., at higher temperature in a better ionic conductor. Also the electrode polarization built up at the electrode-specimen interface could be sorted out above 10 KHz. However, grain boundary contribution couldn't be extracted from the bulk resistance over the frequency range measured here.

• 한국자기학회지
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• 제12권5호
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• pp.168-173
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• 2002

본 연구에서는 인체모델(humman body model; HBM)을 터널링 자기저항(tunneling magneto resistance; TMR)소자에 연결하여 정전기에 대한 방전특성을 연구하였다. 이를 위해 제조된 TMR 시편을 전기적 등가회로 바꿔 HBM에 연결하여 PSPICE를 이용해 시뮬레이션 하였다. 이러한 등가회로에서 접합부분의 모델링 요소들의 값을 변화시켜 방전특성을 관찰할 수 있었다. 그 결과 시편의 저항과 정전용량 성분의 값이 다른 요소들에 비해 수배에서 수백 배까지 커서 정전기 방전(electrostatic discharge; ESD) 민감도를 좌우하는 주요한 요소임을 알 수 있었다. 여기에서 ESD현상에 대한 내구성을 향상시키기 위해서는 정전용량을 증가시키는 것 보다 접합면과 도선의 저항값을 줄이는 것이 유리하다. 그리고 직류 전압에 대해 절연층의 전위 장벽이 낮아져 많은 전류가 흐르게 되는 항복(breakdown)전압과 셀의 물리적 구조 및 성질이 변형되어 회복되지 못하는 파괴(failure)전압을 측정하여 DC 상태에서의 내구성을 연구하였다. 이 결과를 HBM 전압에 대한 파괴 전압으로 간주하여 TMR 소자가 견딜 수 있는 HBM 전압을 예측할 수 있었다.

• 센서학회지
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• 제25권1호
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• pp.1-7
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• 2016

Bioelectrical impedance (BI) at popliteal regions was measured using a bioelectrical impedance measurement system (BIMS), which employs the multi-frequency and the two-electrode method. Experiments were performed as follows. First, a constant AC current of $800{\mu}A$ was applied to the popliteal regions (left and right) and the BI was measured at eight different frequencies from 10 to 500 kHz. When the applied frequency greater than 50 kHz was applied to human's popliteal regions, the BI was decreased significantly. Logarithmic plot of impedance vs. frequency indicated two different mechanisms in the impedance phenomena before and after 50 kHz. Second, the relationship between resistance and reactance was obtained with respect to the applied frequency using BI (resistance and reactance) acquired from the popliteal regions. The phase angle (PA) was found to be strongly dependent on frequency. At 50 kHz, the PA at the right popliteal region was $7.8^{\circ}$ slightly larger than $7.6^{\circ}$ at the left popliteal region. Third, BI values of extracellular fluid (ECF) and intracellular fluid (ICF) were calculated using BIMS. At 10 kHz, the BI values of ECF at the left and right popliteal regions were $1664.14{\Omega}$ and $1614.08{\Omega}$, respectively. The BI values of ECF and ICF decreased sharply in the frequency range of 10 to 50 kHz, and gradually decreased up to 500 kHz. Logarithmic plot of BI vs. frequency shows that the BI of ICF decreased noticeably at high frequency above 300 kHz because of a large decrease in the capacitance of the cell membrane.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권4호
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• pp.381-386
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• 2013

A new resistance model for a Schottky Barrier Diode (SBD) in CMOS technology is proposed in this paper. The proposed model includes the n-well thickness as a variable to explain the operational behavior of a planar SBD which is firstly introduced in this paper. The model is verified using the simulation methodology ATLAS. For verification of the analyzed model and the ATLAS simulation results, SBD prototypes are fabricated using a $0.13{\mu}m$ CMOS process. It is demonstrated that the model and simulation results are consistent with measurement results of fabricated SBD.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1990년도 하계학술대회 논문집
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• pp.261-264
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• 1990

The specific contact resistance(SCR) of metal-semiconductor interface is an important design parameter for VLSI interconnecting technology. As the critical feature size of the integrated structures decrease, the physical size of ohmic contacts will also decrease and the series contact resistance will increase. Al-Si contacts on the annealing condition are studied. The propreties of the contacts depend considerably on the annealing procedures. Barrier height is measured from Capacitance-Voltage characteristics. The specific contact resistance are analyzed using a modified four point method.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.519-520
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• 2008

교류에서의 전기저항값은 저항 elements 사이에서 나타나는 stray 전기용량과 elements의 길이에서 유도되는 인덕턴스의 영향으로 직류에서의 저항값과 차이를 보이게 된다. 이러한 직류와 교류에서의 저항값 차이가 대단히 작게 나면서 직류에서와 측정하는 교류에서의 저항값의 차이를 계산에 의해서 산출할 수 교류저항 표준기가 개발되었다. 개발된 교류저항표준기는 bi-filar 구조의 1 $k\Omega$로서, 1.6 kHz에서 직류/교류 저항값의 차이는 0.02 ${\mu}{\Omega}/{\Omega}$ 보다 작으며, 시정수는 1 kHz에서 $(8{\pm}2)\times10^{-10}$으로 측정되었다. 개발된 교류저항 표준기는 교류저항 국가표준에 최상급 표준기로 사용이 되어질 것이다.

• 전기학회논문지
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• 제59권7호
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• pp.1259-1264
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• 2010

This paper was researched about effectiveness of the electrochemical cell which is composed of the sea water and the Cu/Zn electrode. The electric potential difference between copper and zinc finally reached 0.51 volts. Short current decreased with time. It might depend on the electromotive force decreasing. Confirmed the load resistance and electrode affect in electromotive force and electric current. The resistance which shows a maximum output power was 20[$\Omega$], and the maximum output power from this resistance was evaluated as 0.736mW. In order to calculate the energy which creates from electrochemical cell, charging voltage of the capacitor with various capacitance was investigated. It was found that energy harvesting possibility of the cell which is made of a sea water electrolyte and the copper/the zinc.