• Title/Summary/Keyword: Reset period

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Effect of Scan-bias during Reset Period in a Negative Waveform

  • Park, W.H.;Lee, S.J.;Lee, J.Y.;Kang, J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.728-731
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    • 2009
  • A negative waveform having inverted polarity of conventional waveform during reset and sustain periods was proposed to improve the driving characteristics. In order to control the negative wall-charge distribution, a positive bias on the scan electrode was applied during reset period. Compared to 0 V scan-bias condition, at 8 V scan-bias the formative time lag was improved about 23.95 % and the average time lag was improved about 14.91 %. All experiments were performed with the 42-inch PDP module in XGA resolution.

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Study on Discharge Characteristics Using $V_t$ Close-Curve Analysis in ac PDPs

  • Cho, Byung-Gwon;Tae, Heung-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1185-1188
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    • 2007
  • The address discharge characteristics by the various scan-low and common-bias voltages are investigated based on measured address discharge time lags and $V_t$ close-curve analysis. The scan-low voltages are changed under the same voltage difference between the X and Y electrodes during an address period. As the voltage difference between the scan and address electrodes is increased during an address period, the address discharge time lag is shortened but the background luminance is increased. It is found that the improved address discharge characteristics is caused by the effect of the higher external applied voltage during an address period than the accumulated wall charges during a reset period and the high background luminance can be prevented by applying an address-bias voltage during a rising-ramp period and low reset voltage.

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Effects of Ramp Type-Common Electrode Bias on Reset Discharge Characteristics in AC-PDP

  • Park, Choon-Sang;Cho, Byung-Gwon;Tae, Heung-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1258-1261
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    • 2005
  • The ramp type bias voltage applied to the common electrode during a reset-period is newly proposed to lower the background luminance and to improve the address discharge characteristics in AC-PDP. The positive ramp bias voltage is applied during the ramp-up period, whereas the negative ramp bias voltage is applied during the ramp-down period. The effects of the voltage slopes in both the positive and negative ramp bias voltages on the background luminance and address voltage characteristics are examined intensively. It is observed that the optimized positive and negative ramp bias voltages applied to the common electrode during the ramp-period can lower the background luminance and also enhance the address discharge characteristics of the AC-PDP.

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Selective Reset Waveform using Wide Square Erase Pulse in an ac PDP (AC PDP에서의 대폭소거방식을 이용한 선택적 초기화 파형)

  • Jeong, Dong-Cheol;Whang, Ki-Woong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.12
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    • pp.2189-2195
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    • 2007
  • In this paper, we propose a newly developed selective reset waveform of a ac PDP using the wide erase pulse technique with the control of address bias voltage. Although it is generally understood that the wide pulse erasing methode shows the narrow driving margin in an opposite discharge type ac PDP, we could obtain a moderate driving margin in a 3-electrode surface discharge type ac PDP. The obtained driving margin shows a strong dependency on the sustain voltage and the address bias voltage. The lower the sustain and the address bias voltage, the wider the driving margin. The pulse width of the proposed waveform is only $10{\mu}s$, which gives additional time to the sustain period, hence increases the brightness. The brightness and contrast ratio increase about 20% together comparing to the conventional ramp type selective reset waveform with the driving scheme of 10 subfield ADS method. The driving margin was measured with the line by line addressed pattern on the white test panel of 2inch diagonal size and the discharge gas was Ne+Xe4%, 400torr.

A Basic Study on Implementing Optimal Function of Motion Sensor for Bridge Navigational Watch Alarm System

  • Jeong, Tae-Gweon;Bae, Dong-Hyuk
    • Journal of Navigation and Port Research
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    • v.38 no.6
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    • pp.645-653
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    • 2014
  • A Bridge Navigational Watch Alarm System (hereafter 'BNWAS') is to monitor and detect if an officer of watch(hereafter 'OOW') keeps a sharp lookout on the bridge. The careless lookout of an OOW could lead to marine accidents. For this reason on June 5th, 2009, IMO decided that a ship is equipped with a BNWAS. However, an existing BNWAS gives the OOW a lot of inconvenience and stress in its operation. It requires that the OOW should press reset buttons to confirm their alert watch on the bridge at every three to twelve minute. Many OOWs have complained that at some circumstances they cannot focus on their bridge activities including watch-keeping due to a lots of resetting inputs of BNWAS. Accordingly, IMO has allowed the use of a motion sensor as a resetting device. The motion sensor detects the movements of human body on the bridge and subsequently sends reset signals directly to BNWAS automatically. As a result, OOWs can work uninterrupted. However, some of classification societies and flag authorities have a slightly different stance on the use of motion sensor as a resetting method for BNWAS. The reason is that the motion sensor may trigger false reset signals caused by the motion of objects on the bridge, especially a slight movement such as toss and turn of human body which can extend the period of careless watch. As a basic study to minimize the false reset signals, this paper proposes a simple configuration of BNWAS, which consists of only three motion sensors associated with 'AND' and 'OR' logic gates. Additionally, several considerations are also proposed for the implementation of motion sensors. This study found that the proposed configuration which consists of three motion sensors is better than an existing one by reducing false reset signals caused by a slight movement of human body in one's sleep. The proposed configuration in this paper filters false reset signals and is simple to be implemented on existing vessels. In addition, it can be easily installed just by a basic electrical knowledge.

A New Address-While-Display Driving Method using the $\underline{S}hort\;\underline{R}amp\;\underline{R}eset$ Pulse (SRR) for High Contrast ratio and Wide Address Margin

  • Jung, Jae-Chul;Whang, Ki-Woong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.631-634
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    • 2005
  • We propose a new address-while-display (AWD) driving method to obtain a high contrast ratio and a wide driving margin which is composed of a short ramp reset period, a sustain period and an address period as the basic unit. The short ramp reset (SRR) pulse made it possible to assure the wide operating voltage margin and minimize the background luminance by redistributing the wall charges between address and scan electrode. As a result, a high dark room contrast ratio of 10000 to 1 could be obtained with a wide operating voltage margin of 40V for stable address.

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A New Driving Waveform for Stable Address Discharge in an Alternating Current Plasma Display Panel

  • Kim, Sung-Hwan;Seo, Jeong-Hyun;Lee, Seok-Hyun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.503-506
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    • 2004
  • In this paper, we suggest a new driving waveform for stable address discharge in AC PDP without the reduction of contrast ratio. To analyze the influence of cross-talk between discharge and non-discharge cells and verify that proposed waveform shows a stable address discharge, we measured the address discharge delay time. The proposed waveform shows the reduction of the cross-talk and concurrently the improvement of address voltage margin compared with those of selective reset waveform having one reset period in 1TV-Field..

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A Study of Negative Waveform in ac PDP during Reset and Address Periods (ac PDP에서의 Reset과 Address 구간에서 Negative Waveform특성에 관한 연구)

  • Eom, Cheol-Hwan;Kang, Jung-Won
    • Journal of the Semiconductor & Display Technology
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    • v.8 no.1
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    • pp.27-31
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    • 2009
  • A characteristic of new waveform, called a negative waveform, was studied during reset and address periods. IR distribution, black luminance and time delay were measured to compare the negative waveform with the conventional positive waveform. Based on the analysis of IR measurement, the negative waveform could accumulate more wall charges than the positive waveform. Also the black luminance of negative waveform was lower than that of positive waveform under the same bias and ramp-slope conditions. During address period, the discharge time lag was measured. The negative waveform was showed 0.25 us faster formative time lag and 0.1 us faster average time lag than those of positive waveform.

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A Study on the Effect of Space Charge on the Display Discharge of Plasma Display Panel (플라즈마 디스플레이 패널의 표시방전에 미치는 공간전하의 영향에 관한 연구)

  • Ryeom, Jeong-Duk
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.7
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    • pp.14-20
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    • 2006
  • The discharge characteristics for the reset period of sustain pulses of display discharge in address overlapped display driving methode is studied. It has been understood that the display discharge is strongly influenced of not only the wall charge but also the space charge from the experiment result. The first display discharge which comes out exactly after the rest periods strongly depends on the width of the reset period and as for the second display discharge, the dependancy of it is very low. Even if the first display discharge is a little insufficient if the wall charge is accumulated enough, the second display discharge can be stably induced. However, considering the influence of the space charge, it is preferable within the width of $30[{\mu}s}]$ of the reset period. When the rest period is up to $30[{\mu}s}]$, the uniform voltage operation margin of the display discharge of about 12[V] was obtained.