• Proceedings of the Korea Society for Simulation Conference
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• 2005.05a
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• pp.100-105
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• 2005

Development of complex discrete event simulators requires cooperation between domain experts and modeling experts who involve the development. With the cooperation the domain experts derive user requirement and modeling experts transform the requirement to a simulation model. This paper proposes a method for consistency verification of simulation model in DEVS formalism against the user requirement in UML diagrams. It also presents an automated tool, called VeriDEVS, which implements the proposed method. Inputs of VeriDEVS are three UML diagrams, namely use case, class and sequence diagrams, and DEVS Graph, all in Visio; outputs of a verification result is represented in PowerPoint files.

• Journal of the Korean Society of Systems Engineering
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• v.2 no.2
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• pp.33-38
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• 2006

It is well known that efficient management and thorough implementation of stakeholder requirements is vital for a successful development of a large-scale and complex system. Equally important is to make sure that all the requirements be correctly realized in the developed system. For the purpose, verification requirements are derived with traceability from the system requirements. This paper discusses a step by step process for constructing the requirements verification model which includes : 1) the schema modeling both requirements and their traceability; 2) the template documenting the verification requirements; 3) the verification model constructed from the schema; and 4) the test and evaluation plan that can be printed automatically.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.1000-1007
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• 2007

Recently, many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased assurance for such applications. Earlier error of overlooked requirement specification can be detected using formal specification method. Also the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In the comparison of other formal specification methods, we choose the Z formal language for applying to the train control system. Using Z is able to realize higher correctness in the requirement specification, and we propose the Statemate of the best solution in formal verification tools for the system modeling and verification. The Statemate makes it possible to prove thoroughly the system execution from the simple graphical modeling of the complicated train control system. Then we can expect that the model-based formal method combining Z with Statemate will be utilized widely for the railway systems due to various strong points.

• 시스템엔지니어링워크숍
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• s.6
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• pp.126-129
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• 2005

Systems engineering requirement verification model developmetn for High Speed Railway systems in progress is a national large system development program that is not only large-size and complex but also multi-disciplinary in nature. For the High Speed Railway TEP development, verification requirements that could verify system function, performance, and constraint, should be derived from SSS(system Segment specification). Hereafter, this could be referred to as verification requirements. System engineering process establishes traceability between verification requirements and system requirements. These tasks could be accomplished by the schema. using computer-aided Systems Engineering tool(CORE), High Speed Railway program can become a database and other system related to High Speed Railway program will be developed effectively and efficiently.

• Journal of Electrical Engineering and Technology
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• v.4 no.1
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• pp.87-92
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• 2009

Many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased assurance for such applications. Earlier errors of overlooked requirement specification can be detected using the formal specification method. Also, the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we proposed an eclectic approach to incorporate Z(Zed) formal language and 'Statemate MAGNUM', formal method tools using Statechart. Also we applied the proposed method to train control systems for the formal requirement specification and analyzed the specification results.

• Journal of Korea Multimedia Society
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• v.3 no.1
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• pp.77-90
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• 2000

Real-Time verification is a procedure that verifies the correctness of specification related to requirement in time as well as in logic. One serious problem encountered in the verification task is that the state space grows exponentially owing to the unboundedness of time, which is termed the state space explosion problem. In this paper, we propose a real-time verification technique checking the correctness of specification by showing that a system model described in timed automata is equivalent to the characteristic of system property specified in timed modal-mu calculus. For this, we propose a local model checking method based on the value of the formula in initial state with constructing product graph concerned to only the nodes needed for verification process. Since this method does not search for every state of system model, the state space is reduced drastically so that the proposed method can be applied effectively to real-time system verification.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.7
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• pp.425-433
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• 2016

The construction of a light rail transit (LRT) system is a large and complex infrastructure project involving hundreds of billions of won in construction costs for a single route, and it is very important to carry out such a project from a life-cycle perspective because of its long-term operation. Systems engineering is a means and methodology to successfully implement customers' needs, and it is useful in large projects such as light rail transit. An application model called Systems Engineering for Light Rail Transit (SELRT) was developed to support systems engineering activities in light rail transit projects. In order to utilize SELRT, it is necessary to ensure that system requirements are met. As such, in this paper, we present a verification procedure and architecture based on a systems engineering-based methodology, thereby identifying the system requirements and deriving the verification requirements to confirm the SELRT model for the proposed method. The results show that the traceability of the system requirements and verification requirements, the verification method for each requirement, and the demonstration results for computerized tools are mutually connected, and that the initial requirements are clearly implemented in the SELRT. The proposed method is valid for verifying the SELRT, which can also be utilized in a LRT project.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.5
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• pp.169-174
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• 2009

In this paper, We define convert rules objects and relation presented in object model to the state and operation domain in formal specification. we implement simulation tool in order to verification method of formal specification and to consistency verified model between user's requirement. It is possible to select the suitable model and reduce the costs and efforts on software development.

• Journal of the Korea Society of Computer and Information
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• v.12 no.6
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• pp.123-130
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• 2007

In this paper, We define convert rules from objects and relation presented in object model to the state and operation domain in formal specification. Namely, object and relation in information model converted to state domain in formal specification. State, event and behavior converted to operation domain. And that way informal object model change to formal language, it can be verify through formal method. Verification process make an offer convenience and confidence in software development early phase. And we implement simulation tool in order to verification method of formal specification and to consistency verified model between user's requirement. It is possible to select the suitable model and reduce the costs and efforts on software development.

• 시스템엔지니어링워크숍
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• s.1
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• pp.9-14
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• 2003

The paper aims at presenting a systematic approach process and a method of requirement validation and system verification. Validation is applied during concept development to ensure conceptual validity, requirements validity, and design validity. Verification work is applied subsequent to the design work on test articles and early production items to produce evidence that the design solutions do, in fact, satisfy th requirements. In this paper, we present a requirements validation model and a system verification model. This models are applied to the development of TTX(Tilting Train Express)system with systems engineering tool, CORE.