• Journal of Advanced Marine Engineering and Technology
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• v.33 no.8
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• pp.1254-1260
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• 2009

CDMA tele-Controller system is designed with a low power consumption 8 bit microcontroller, ATmega 2560. ATmega 2560 microcontroller consists of 4 UART (Universal asynchronous receiver/transmitter) ports, 4 kbytes EEPROM, 256 kbytes flash memory, 4 kbytes SRAM. 4 URAT is used for CDMA modem, communication for GPS module, EEPROM is used for saving a configuration for program running, a flash memory of 256 kbytes is used for storing a F/W(Firm Ware), and SRAM is used for stack, storing memory of global variables while program running. We have tested the communication distance between the coast station and sea by the fabricated control board using 800 MHz CDMA modem and GPS module, which is building for the navigational aid management system by remote control. As a results, the receiving signal strength is above -80 dBm, and then the characteristics of the control board implemented more than 10 km in the distance of the communication.

• Korean Journal of Remote Sensing
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• v.33 no.2
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• pp.125-134
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• 2017

Recent advance in the satellite-based remote sensing technology demands abilities to efficiently processthe massive satellite data. In thisstudy, we focused on developing GOCI Products Reprocessing System (GPRS) based on server virtualization and distributed processing in order to efficiently reprocess massive GOCI data. Experimental results revealed that GPRS allows raising the usage rates of memory and central processing unit (CPU) up to about 100% and 75%, respectively. This meansthat the proposed system enables us to save the hardware resources and increase the work process speed at the same time when we process massive satellite data.

• Journal of Korea Multimedia Society
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• v.8 no.12
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• pp.1605-1612
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• 2005

This paper presents the knowledge and experience we obtained by employing multiprocessor systems as a computer simulation design verification to study high-performance computing system. This paper also describes a case study of symmetric multiprocessors (SMP) kernel on a 32 CPUs CC-NUMA architecture using an actual architecture. A small group of CPUs of CC-NUMA, high-performance computer system, is clustered into a processing node or cluster. By simulating the system design verification tools; we discussed SMP OS kernel on a CC-NUMA multiprocessor architecture performance which is $32\%$ of the total execution time and remote memory access latency is occupied $43\%$ of the OS time. In this paper, we demonstrated our simulation results for multiprocessor, high-performance computing system performance, using simulation-based design verification.

• Database Research
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• v.34 no.3
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• pp.14-27
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• 2018

Recently, to alleviate the memory bottleneck problme occurred in Symmetric Multiprocessing (SMP) architecture, Non-Uniform Memory Access (NUMA) architecture was proposed. In addition, since an aggregation operator is an important operator providing properties and summary of data, the efficiency of the aggregation operator is crucial to overall performance of a system. Thus, in this paper, we propose an efficient aggregation processing technique on NUMA architecture. Our proposed technique consists of partition phase and merge phase. In the partition phase, the target relation is partitioned into several partial relations according to grouping attribute. Thus, since each thread can process aggregation operator on partial relation independently, we prevent the remote memory access during the merge phase. Furthermore, at the merge phase, we improve the performance of the aggregation processing by letting each thread compute aggregation with a local hash table as well as avoiding lock contention to merge aggregation results generated by all threads into one.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.1096-1098
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• 2003

SBC(Single Board Computer) is being developed for MSC(Multi-Spectral Camera) on KOMPSAT-2(Korea Multi-Purpose Satellite). SBC controls all the units of MSC system and gets commands and sends telemetry to and from spacecraft bus via 1553 communication channel. Due to the fact that SBC does very important roles for MSC system operation and SBC operates with 100% duty cycle, SBC is designed to have high reliability. SBC which has Intel 80486 as a main processor includes eight serial communication channels, one mil-std-1553 interface channel and several discrete interfaces. SBC incorporates 2Mbyte radiation hardened SRAM(Static Random Access Memory) and 1Mbyte flash memory. There are also PIC(Programmable Interrupt Controller), counter, WDT(Watch Dog Timer) in the SBC. In this paper, the design result of the SBC is presented.

• Journal of the Korea Society of Computer and Information
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• v.17 no.2
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• pp.177-185
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• 2012

In this paper, we developed the composition system that it can efficiently edit camera recording data, images, office document such as powerpoint data, MS word data etc in real-time and broadcasting system that the file is made by the composition system. In this Study, we developed two kinds of algorithm; Approximate Composition for Optimization (ACFO) and Sequence Composition using Memory Que (SCUMQ). Especially, the system is inexpensive and useful because the system is based on mobile devices and PCs when lectures hope to make video institutional contents. Therefore, it can be contributed for e-learning and m-learning. In addition, the system can be applied to various fields, different kinds of multimedia creation, remote conferencing, and e-commerce.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.2
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• pp.102-114
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• 1987

In this paper, in order to develop the transmission system between the remote subscriber and the central office, the hardware and software implementation of a SMUX(Statistical Multiplexer)which can interleace eleven 16Kbps D-channels over a 64Kbps B-channel is obtained. As a result of this study, the high speed data transmission by the use of a dynamic buffer memory management algofithm for statistical multiplexing is realized. Especially a software architectur for interruption is proposed in order to improve performance of the transmission system more efficiently.

• KIISE Transactions on Computing Practices
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• v.21 no.12
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• pp.792-797
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• 2015

Effective profiling diagnoses the failure of the system and informs risk. If a failure in the target system occurs, it is impossible to diagnose more than one of the exiting tools. In this respect, monitoring of the system based on virtualization is useful. We present in this paper a monitoring framework that uses the characteristics of hardware virtualization to prevent side-effects from a target guest, and uses dynamic binary instrumentation with instruction-level trapping based on hardware virtualization to achieve efficiency and flexibility. We also present examples of some applications that use this framework. The framework provides tracing of guest kernel function, memory dump, and debugging that uses GDB stub with GDB remote protocol. The experimental evaluation of our prototype shows that the monitoring framework incurs at most 2% write memory performance overhead for end users.

• Korean Journal of Remote Sensing
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• v.15 no.3
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• pp.209-216
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• 1999

KITSAT-3, the third satellite of KITSAT series which has been developed for the last four and half years with purely Korean design and implementation technology, was launched successfully at last. All subsystems were tested and validated during the initial operation of the satellite. During the initaial operation phase, the Earth imaging camera on board KITSAT-3 acquisited several tens of scenes all over the world and transmitted the image data to ground station. The quality of images and the reliability of data transmission-reception system were tested qualititively and quantititively, respectively. In this paper, we summarize the camera, data handling, on-board memory, and image data transmission system of KITSAT-3 as well as the image receiving and archiving system in ground station. The error rate of image data transmission and reception was tested during the initial operation phase. The average data transmission error rate satisfied the initial requirement of less than 1%. The error rate will be reduced through the continuous work of test and stabilization of the ground system hardware.

• Proceedings of the KSRS Conference
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• v.1
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• pp.417-420
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• 2006

In these days, mobile application dealing with information contents on mobile or handheld devices such as mobile communicator, PDA or WAP device face the most important industrial needs. The motivation of this study is the design and implementation of mobile application using high resolution satellite imagery, large-sized image data set. Although major advantages of mobile devices are portability and mobility to users, limited system resources such as small-sized memory, slow CPU, low power and small screen size are the main obstacles to developers who should handle a large volume of geo-based 3D model. Related to this, the previous works have been concentrated on GIS-based location awareness services on mobile; however, the mobile 3D terrain model, which aims at this study, with the source data of DEM (Digital Elevation Model) and high resolution satellite imagery is not considered yet, in the other mobile systems. The main functions of 3D graphic processing or pixel pipeline in this prototype are implemented with OpenGL|ES (Embedded System) standard API (Application Programming Interface) released by Khronos group. In the developing stage, experiments to investigate optimal operation environment and good performance are carried out: TIN-based vertex generation with regular elevation data, image tiling, and image-vertex texturing, text processing of Unicode type and ASCII type.