• 제목/요약/키워드: Reference Frequency

검색결과 1,615건 처리시간 0.024초

주파수 차이 검출기를 이용한 광파의 off-set 주파수 로킹 연구 (A Study on the Lightwave off-set Locking using Frequency Difference Detector)

  • 유강희
    • 한국정보통신학회논문지
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    • 제8권2호
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    • pp.484-493
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    • 2004
  • 본 논문은 초고주파 주파수 차이 검출기를 이용한 광파의 off-set 로킹에 대하여 설계 및 제작 실험 결과를 기술하였다. 두 광파를 비팅하여 중간 주파수인 1.5GHz 주파수 성분을 추출하고 이 값을 다시 1.5GHz 기준 발진기 주파수와 곱하여 차이주파수 성분을 추출한 후 주파수 차이 검출기를 이용하여 주파수 로킹을 시켰다. 상용화된 초고주파 부품을 사용하여 주파수 차이 검출기를 제작하였으며 1.55$\mu\textrm{m}$ 파장의 반도체 레이저의 발생 광파를 입력 광파와 1.5GHz의 주파수 off-set을 유지하면서 로킹이 이루어짐을 확인하였으며 로킹 범위는 320MHz이었다.

Ionospheric Storm Detection Method Using Multiple GNSS Reference Stations

  • Ahn, Jongsun;Lee, Sangwoo;Heo, Moonbeom;Son, Eunseong;Lee, Young Jae
    • Journal of Positioning, Navigation, and Timing
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    • 제8권3호
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    • pp.129-138
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    • 2019
  • In this work, we propose detection method for ionosphere storm that occurs locally using widespread GNSS reference stations. For ionosphere storm detection, we compare ionosphere condition with other reference stations and estimate direction of movement based on ionosphere time variation. The method use carrier phase measurement of dual frequency, for accuracy and precision of test statistics, are evaluated with multiple GNSS reference stations data.

소음 주파수 추정 기법을 이용한 능동소음제어 알고리즘 (Active noise control algorithm based on noise frequency estimation)

  • 김선민;박영진
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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    • pp.321-324
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    • 1997
  • In this paper, Active Noise Control(ANC) algorithm is proposed based on the estimated frequency estimator of the reference signal. The conventional feedforward ANC algorithms should measure the reference and use it to calculate the gradient of the squared error and filter coefficients. For ANC systems applied to aircrafts and passenger ships, engines from which reference signal is usually measured is so far from seats where main part of controller is placed that the scheme might be difficult to implement or very costly. Feedback ANC algorithm which doesn't need to measure the reference uses the error signal to update the filter and is sensitive to unexpected transient noise like a sneeze, clapping of hands and so on The proposed algorithm estimates frequencies of the desired signal in real time using adaptive notch filter. New frequency estimation algorithm is proposed with the improved convergence rate, threshold SNR and computational simplicity. Reference is not measured but created with the estimated frequencies. It has strong similarity to the conventional feedback control because reference is made from error signal. Enhanced error signal is used to update the controller for better performance under the measurement noise and impact noise. The proposed ANC algorithm is compared with the conventional feedback control.

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개선된 자동 주파수 보정회로를 이용한 광대역 클록 발생기 설계 (A Wideband Clock Generator Design using Improved Automatic Frequency Calibration Circuit)

  • 정상훈;유남희;조성익
    • 전기학회논문지
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    • 제60권2호
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    • pp.451-454
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    • 2011
  • In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

공간주파수대역에서 기저대역 확장을 통한 원전 대비시험편과 대비 보정 시험편의 초음파 영상 개선 (Ultrasonic Images Enhancement of the SS Reference Specimen and the Reference Calibration Block for NPPs by the Combining Bases of Support for Spatial Frequency)

  • 박치승;김선진
    • 한국재료학회지
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    • 제13권10호
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    • pp.651-657
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    • 2003
  • Ultrasonic microscope has been used to detect the defects on surface or inner solid. Conventionally, it has used at a single operating frequency. The resolution and quality of the measured images are determined by a characteristic of the transducer of the ultrasonic microscope. The conventional ultrasonic microscope has been used envelope detector to detect the amplitude of reflected signal, but the changes in amplitude is not sensitive enough for specimen with microstructure that in phase. In this paper, we have studied multi-frequency depth resolution enhancement with ultrasonic reflection microscope for the reflectors of a stainless steel reference specimen and a reference calibration block to be used as the material in nuclear power plants for ISI, PSI. Increased depth resolution can be obtained by taking two, three-dimensional images at more that one frequency and numerically combining the results. As results of the experiment, we could get enhanced images with the rate of contrast in proportion and high quality signal distribution for the image to the changing rate of depth for the reflectors of the two kinds of specimens.

A 1.8 V 0.18-μm 1 GHz CMOS Fast-Lock Phase-Locked Loop using a Frequency-to-Digital Converter

  • Lee, Kwang-Hun;Jang, Young-Chan
    • Journal of information and communication convergence engineering
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    • 제10권2호
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    • pp.187-193
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    • 2012
  • A 1 GHz CMOS fast-lock phase-locked loop (PLL) is proposed to support the quick wake-up time of mobile consumer electronic devices. The proposed fast-lock PLL consists of a conventional charge-pump PLL, a frequency-to-digital converter (FDC) to measure the frequency of the input reference clock, and a digital-to-analog converter (DAC) to generate the initial control voltage of a voltage-controlled oscillator (VCO). The initial control voltage of the VCO is driven toward a reference voltage that is determined by the frequency of the input reference clock in the initial mode. For the speedy measurement of the frequency of the reference clock, an FDC with a parallel architecture is proposed, and its architecture is similar to that of a flash analog-to-digital converter. In addition, the frequency-to-voltage converter used in the FDC is designed simply by utilizing current integrators. The circuits for the proposed fast-lock scheme are disabled in the normal operation mode except in the initial mode to reduce the power consumption. The proposed PLL was fabricated by using a 0.18-${\mu}m$ 1-poly 6-metal complementary metal-oxide semiconductor (CMOS) process with a 1.8 V supply. This PLL multiplies the frequency of the reference clock by 10 and generates the four-phase clock. The simulation results show a reduction of up to 40% in the worstcase PLL lock time over the device operating conditions. The root-mean-square (rms) jitter of the proposed PLL was measured as 2.94 ps at 1 GHz. The area and power consumption of the implemented PLL are $400{\times}450{\mu}m^2$ and 6 mW, respectively.

LCL 필터를 사용하는 계통연계형 인버터의 동기좌표계 PI 전류제어 안정도 해석 (Analysis of Current Control Stability using PI Control in Synchronous Reference Frame for Grid-Connected Inverter with LCL Filter)

  • 조종민;이태진;윤동현;차한주
    • 전력전자학회논문지
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    • 제21권2호
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    • pp.168-174
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    • 2016
  • In this paper, current control using PI controller in the synchronous reference frame is analyzed through the relationship among bandwidth, resonance frequency, and sampling frequency in the grid-connected inverter with LCL filter. Stability is investigated by using bode plot in frequency domain and root locus in discrete domain. The feedback variable is the grid current, which is regulated by the PI controller in the synchronous reference frame. System delay is modeled as 1.5Ts, which contains computational and PWM modulator delay. Two resonance frequencies are given at 815 Hz and 3.16 kHz from LCL filter parameters. Sufficient phase and gain margins can be obtained to guarantee stable current control, in case that resonance frequency is above one-sixth of the sampling frequency. Unstable current control is performed when resonance frequency is below one-sixth of the sampling frequency. Analysis results of stability from frequency response and discrete response is the same regardless of resonance frequency. Finally, stability of current control based on theoretical analysis is clearly verified through simulation and experiment in grid-connected inverters with LCL filter.

저압설비 플리커 특성평가를 위한 국내 저압계통 기준 임피던스 산정 연구 (A Study on the Calculation of Reference Impedances in Domestic Low-Voltage Power System)

  • 강문호;송양회;이흥호
    • 전기학회논문지
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    • 제60권9호
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    • pp.1651-1655
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    • 2011
  • The reference impedances which is about 95% supply impedance value of residential consumers' supply impedances was published by IEC in 1980. The reference impedances are the standard values for use in determining the voltage disturbance characteristics of electrical equipment like the flicker. In IEC 60725, the reference impedances for premises having service current capacities less than 100A per phase and for service current capacities more than 100A per phase are recommended. And these reference impedances are targeted for the countries using 50Hz power frequency. Because of the frequency difference, the reactance values of the reference impedances will be increased in 60Hz power system like Korea, And also the reference impedances are different significantly each other according to declared voltage variation, power consumption and service wire length etc. Therefore It is needed to calculate the reference impedances suitable for domestic low-voltage power system. In this paper, the reference impedances for service current capacities less than 100A in 220/380V, 60Hz single-phase two wire and three-phase four wire low-voltage system are calculated, And the equations for service current capacities more than 100A to calculate the modulus value of maximum supply impedances are suggested base on IEC 60725 and the reference impedances for those are calculated on service current of 100A per phase.

LTE OFDM 시스템에서의 기준 심볼 배치 (Reference Symbol Arrangement in LTE OFDM Systems)

  • 최승국
    • 한국정보통신학회논문지
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    • 제19권12호
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    • pp.2805-2812
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    • 2015
  • OFDM 시스템에서는 시변이며 주파수 선택적인 전송 채널을 추정하기 위하여 보통 기준 심볼을 이용한다. 우선 LTE 표준의 기준 심볼 배치를 이용하여 채널을 추정할 때의 LTE OFDM 시스템 비트 오류율 성능을 분석한다. 분석결과, LTE 표준 기준 심볼 배치 경우에 도플러 시변 페이딩에는 강인하나 주파수 선택적 페이딩에 대하여는 채널 추정 오차가 크게 되어 비트 오류율 성능 열화가 발생된다. 그러므로 본 논문에서 효율적이고 우수한 채널 추정을 위하여 등간격 다이아몬드 격자 모양의 기준 심볼 배치이며 주파수 영역에서 매 4번째 부반송파 간격마다 기준 심볼을 배치하는 개선된 기준 심볼 배치 모양을 새로이 제시한다.

여러 개의 참고입력 신호를 사용하는 강인한 주파수 영역 협대역 잡음 제거기 (A Robust Frequency-Domain Multi-Reference Narrowband Adaptive Noise Canceller)

  • 김성우;서지호;류영우;박영철;윤대희
    • 한국음향학회지
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    • 제34권2호
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    • pp.163-170
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    • 2015
  • 본 논문에서는 여러 개의 참고입력을 사용하는 기존의 주파수 영역 협대역 잡음 제거기의 성능이 참고신호에 포함된 협대역 성분과 광대역 방해 신호에 의해 결정됨을 보였다. 또한 기존의 협대역 잡음 제거기 보다 효율적이고 빠른 수렴 속도를 얻기 위해 주신호와 참고신호들의 MSC(Magnitude Squared Coherence)를 사용하여 참고신호의 SNR을 측정하고, 이를 바탕으로 적응 필터의 갱신 여부를 결정하는 새로운 협대역 적응 잡음 제거 기법을 제안하였다. 수식적 분석을 통하여 광대역 방해 신호의 영향을 분석하였으며, 제안한 기법이 기존 기법보다 더 우수한 성능을 보임을 확인하였다.