• Management Science and Financial Engineering
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• v.7 no.2
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• pp.73-90
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• 2001

This paper presents the reliability models for redundant systems composed of repairable components whose failure time and repair time distributions are phase-type. It is shown that the distribution of time to system failure is also phase-type. The dependency between components are considered and integrated into the model by the used of the rate adjustment factor. The phase-type representation is constructed for the system through algebraic operations on the parameters of components\` failure time and repair time distributions and the corresponding rate adjustment factors. Types of system structures considered are parallel, k-out-of-N system with load sharing scheme and standby system with operation priority.

• Journal of Astronomy and Space Sciences
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• v.15 no.2
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• pp.485-497
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• 1998

To estimate the availability of the MCE for KOMPSAT I, mathematical models of H/W and S/W availability, the availability estimating methods for parallel and redundant system were presented. Furthermore, to improve and estimate the MCE system availability, we analyzed the computational procedure of redundant methods, and we also included effective switch choosing methods in this paper. The analytical results of the MCE system availability were estimated as follows: - 0.995216 not considering system redundancy, - 0.9955165 considering system redundancy, and -0.9963991 for the time of system real time operation.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.5
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• pp.7-16
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• 2000

This paper described a design and implementation of the division/square-root for a redundant floating point binary number using high-speed quotient selector. This division/square-root used the method of a redundant binary addition with 25MHz clock speed. The addition of two numbers can be performed in a constant time independent of the word length since carry propagation can be eliminated. We have developed a 16-bit VLSI circuit for division and square-root operations used extensively in each iterative step. It performed the division and square-toot by a redundant binary addition to the shifted binary number every 16 cycles. Also the circuit uses the nonrestoring method to obtain a quotient. The quotient selection logic used a leading three digits of partial remainders in order to be implemented in a simple circuit. As a result, the performance of the proposed scheme is further enhanced in the speed of operation process by applying new quotient selection addition logic which can be parallelly process the quotient decision field. It showed the speed-up of 13% faster than previously presented schemes used the same algorithms.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.583-584
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• 2008

This paper presents a low-power and high-speed pulsed flip-flop based on dual-precharging and conditional discharging. The dual-precharging operation minimizes the parasitic capacitance of each precharge node, resulting in high-speed operation. The conditional-discharging operation minimizes the redundant transitions of precharge nodes, resulting in low-power operation. Linear feedback shift register (LFSR) designed in a $0.18{\mu}m$ CMOS technology using the proposed flip-flop achieves 32% power reduction as compared to conventional design.

• Proceedings of the KSR Conference
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• 2011.05a
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• pp.263-268
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• 2011

There are many exclusive freight cars in railway freight transportation system. Gondola is one kind of freight cars. Gondolas have a role to carry bulk-type cargo such as coals and ores. A few problems are occurring due to exclusive freight cars. Operation company has redundant freight cars because exclusive freight cars can carry limited items. And purchasing cost of freight cars is higher and higher because of irregular bid. Operation efficiency of gondola is very low because return time of gondola is much longer than that of container car. In this study, we analysed the introduction effect of hopper-type container for through transit. First, we identified the characteristics of spatial distribution on freight stations. And we provided the effect of hopper-type container in terms of operation efficiency, cost reduction, new demand excavation and image enhancement of eco-friendly railroad.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.102-106
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• 2003

This paper describes novel low-power high-speed flip-flop called dual edge-triggered NAND keeper flip-flop (DETNKFF). The flip-flop achieves substantial power reduction by incorporating dual edge-triggered operation and by eliminating redundant transitions. It also minimizes the data-to-output latency by reducing the height of transistor stack on the critical path. Moreover, DETNKFF allows negative setup time to provide useful attribute of soft clock edge by incorporating the pulse-triggered operation. The proposed flip-flop was designed using a $0.35{\;}\mutextrm{m}$ CMOS technology. The simulation results indicate that, for the typical input switching activity of 0.3, DETNKFF reduces power consumption by as much as 21 %. Latency is also improved by about 6 % as compared to the conventional flip-flop. The improvement of power-delay product is also as much as 25 %.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2358-2361
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• 2003

In this paper, parallel control method that enables coordinating operations of multiple mini ice storage air conditioner is proposed based on LonWorks system. The proposed parallel control method is a kind of master/slave control method based on LonTalk network communication. In the control method, master controller leading whole system operations is determined by date to avoid the disproportion of outdoor unit operations. In addition to the above, duty shift control method is proposed to avoid redundant operations of outdoor units and to equalize the operation frequencies of them. Through some simulation tests, the proposed parallel control method and the duty shift control method are evaluated and the efficiencies of them are validated by comparing with existing methods.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.499-503
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• 2000

The use of Multiple-Valued FFT(Fast fourier Transform) is extended from binary to multiple-valued logic(MVL) circuits. A multiple-valued FFT circuit can be implemented using current-mode CMOS techniques, reducing the transitor, wires count between devices to half compared to that of a binary implementation. For adder processing in FFT, We give the number representation using such redundant digit sets are called redundant positive-digit number representation and a Redundant set uses the carry-propagation-free addition method. As the designed Multiple-valued FFT internally using PD(positive digit) adder with the digit set 0,1,2,3 has attractive features on speed, regularity of the structure and reduced complexities of active elements and interconnections. for the mutiplier processing, we give Multiple-valued LUT(Look up table)to facilitate simple mathmatical operations on the stored digits. Finally, Multiple-valued 8point FFT operation is used as an example in this paper to illuatrates how a multiple-valued FFT can be beneficial.

• Journal of the Korea Institute of Military Science and Technology
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• v.13 no.2
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• pp.243-251
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• 2010

The military has been putting great efforts into applying data communication on existing voice communication systems being used in NCW(Network Centric Warfare). Data communication will be an effective choice in one of many effort to yield a minimum kill chain, comparing to legacy voice communications, when tactical units conduct their missions. However, the required budget will be enormous, in case of the replacement of a lot of legacy communication systems with new one. As a cost-effective alternative, the tactical data communication systems using the conventional radio systems instead of the development of new radio systems has been proposed. It is mandatory, though, to ensure QoS while maintaining data communication by making use of legacy radio systems already in use. This paper focuses on the performance issues experimented and analyzed for tactical data communication through the legacy radio systems as the first step towards guaranteed QoS. We have conducted various experiments such as the transmission error rate on certain tactical messages, performance evaluation of redundant transfers, the relationship between the transmission frame size and rate of error, the identification of error points in the transmission frame, and techniques to reduce the errors in both hopping and non-hopping modes. As a result of the performance experiments, The adaptive communication module which decides the redundant transmission or the Forward Error Correction(FEC) technique by analyzing channel status and current transmission status(hopping/non-hopping) of the legacy radio should be designed. the FEC technique in non-hopping, and the redundant transmission technique in hopping mode was recommended from the result of experiment with the frame size is 20bytes in non-hopping and 10Bytes frame size in hopping mode.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.4
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• pp.43-51
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• 2013

This paper proposes the design of protocol management system for aggregationg messages based on certification between vehicles which not only prevents the messages between vehicles from being forged and altered by Sybil attack by authenticating the them, and but also provides the efficient communication by aggregating the redundant vehicle messages which frequently happens when communicating. For this, the proposed system proposes the SKLC(Session Key Local Certificate) design which is a local certificate based on a session key, and the MAP(Message Aggregation Protocol) design which aggregates the redundant vehicle messages. Therefore, when the proposed system checks the certificate of vehicle, it provides the reliable information securely by verifying the integrity of vehicle with a hash function operation, and improves communication efficiency by reducing the processing time.