• Title/Summary/Keyword: Reduction device

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An Analysis of IGBT(Insulator Gate Bipolar Transistor) Structure with an Additional Circular Trench Gate using Wet Oxidation (습식 산화를 이용한 원형 트렌치 게이트 IGBT에 관한 연구)

  • Kwak, Sang-Hyeon;Kyoung, Sin-Su;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.11
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    • pp.981-986
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    • 2008
  • The conventional IGBT has two problems to make the device taking high performance. The one is high on state voltage drop associated with JFET region, the other is low breakdown voltage associated with concentrating the electric field on the junction of between p base and n drift. This paper is about the structure to effectively improve both the lower on state voltage drop and the higher breakdown voltage than the conventional IGBT. For the fabrication of the circular trench IGBT with the circular trench layer, it is necessary to perform the only one wet oxidation step for the circular trench layer. Analysis on both the on state voltage drop and the breakdown voltage show the improved values compared to the conventional IGBT structure. Because the circular trench layer disperses electric field from the junction of between p base and n drift to circular trench, the breakdown voltage increase. The on state voltage drop decrease due to reduction of JFET region and direction changed of current path which pass through reversed layer channel. The electrical characteristics were studied by MEDICI simulation results.

A study for the design of data-acquisition system and the reduction of power consumption (데이터 취득 시스템 설계 및 소모 전력 감소에 관한 연구)

  • Kim, Do-Hun;Lee, Yong-Jea;Kim, Yong-Sang;Yim, Sang-Uk;Kim, Yang-Mo
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2705-2707
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    • 2003
  • Over the past several years, the application extent of the real-time systems is being expanded with the progress of civilization. An effort to minimize power consumption at the system is being accomplished in several fields from the design of an analog/digital circuit up to the device level. Things of this effort have included the power optimum-technique to minimize power consumption at the digital logic circuit and the dynamic managed skill by means of the decision of the operating system. In this paper, we designed of low power system by using power-optimized method. As an effective low-power design, we designed the low power system which it has a monitoring system within the main board and a personal computer.

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NiO(Co0.25Mn0.75)2O3 and BaSrTiO3 thick films on alumina substrate as temperature and humidity ceramic multisensors

  • Oh, Young-Jei;Lee, Deuk-Yong
    • Journal of Sensor Science and Technology
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    • v.18 no.5
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    • pp.343-348
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    • 2009
  • $NiO{\cdot}(Co_{0.25}Mn_{0.75})_2O_3$(Mn-Ni-Co) and $Ba_{0.5}Sr_{0.5}TiO_3$(BST) thick films were screen printed on Pt patterned alumina substrate to investigate the effects of sintering temperature on humidity and temperature sensing properties of ceramic sensors. A raise in sintering temperature increased resistance and B constant of the Mn-Ni-Co temperature sensor. This may have derived from the synergic effects of the reduction in charge carriers caused by the substitution of Co for Mn as well as the formation of microcracks from the difference in thermal expansion coefficients. Dependence of resistance on humidity of the Mn-Ni-Co temperature sensor, however, was not found. BST films sintered at temperatures in the range of $1100^{\circ}C$ to $1150^{\circ}C$ showed excellent humidity sensing properties. The BST humidity sensor was faster in its response than the Mn-Ni-Co temperature sensor. The humidity sensor, however, proved to be unstable under various temperatures, suggesting a need for a temperature stabilizing device. In contrast, the Mn-Ni-Co temperature sensor was stable under humid conditions.

High Efficiency DC/DC converter using MOSFET and IGBT (MOSFET와 IGBT를 이용한 DC/DC 컨버터의 효율 증대)

  • Kwon H.N.;Jeon Y.S.;Ban H.S.;Choe G.H.;Bae J.H.
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.520-524
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    • 2001
  • Recently, the demand of large capacity SMPS for industrial area is increasing. Full-bridge dc-dc converter with IGBT is most widely used for large capacity SMPS because IGBT has a low-conduction loss and large current capacity, But most large capacity Full-bridge do-dc converter using IGBT has low operating frequency because of switching loss at IGBT especially at turn-off by current tail and it's cause of relatively big converter size. MOSFET has low switching losses has been widely used for high frequency SMPS but it has a problem to apply to large capacity SMPS because it has large conduction resistance causing large on-time losses. In this paper, for reduction losses at switching device, MOSFET is applied at parallel with IGBT in full-bridge dc/dc converter.

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A Study on the Design and Chracteristic Analysis for Noise Cut Transformer (NCT 설계 및 특성 분석에 관한 연구)

  • 이재복;허창수
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.12 no.4
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    • pp.146-154
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    • 1998
  • Broadband noise with frequency components in the range from several kHz up the tens of MHz is a major obstacle factor in normal operation of the AC line to supply the power to electrical and electronic control equipments. Because this kind of noise could damage the device or could be a source of malfunction, many devices such as filter and surge suppressor are used to cut off the noise. But those devices could not disconnected from the power line, so they result in poor common-mode of NCT as well as insulation characteristics as a isolation transformer in addition faraday shielding and proposed analysis model of NCT having tow functions of surge and noise reduction. The simulated and experimental results for the surge suppression characteristics are compared and evaluated for designed protype 1[kVA] NCT.

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Study on the High Efficiency Bi-directional DC/DC Converter Topology Using Multi-Phase Interleaved Method (Multi-Phase 인터리브드 방식을 이용한 고효율 양방향 DC/DC 컨버터 토폴로지에 관한 연구)

  • Choi, Jung-Sik;Park, Byung-Chul;Chung, Dong-Hwa;Oh, Seung-Yeol
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.2
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    • pp.82-90
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    • 2015
  • This paper proposes an efficient bi-directional DC/DC converter topology using multi-phase interleaved method for power storage system. The proposed converter topology is used for a power storage system using a vanadium redox flow battery(VRFB) and is configured to enable bidirectional power flow for charging and discharging of VRFB. Proposed DC/DC converter of the 4 leg method is reduced to 1/4 times the rating of the reactor and the power semiconductor device so can be reduce the system size. Also, proposed topology is obtained the effect of four times the switching frequency as compared to the conventional converter in each leg with a 90 degree phase shift 4 leg method. This can suppress the reduction of the life of the secondary battery because it is possible to reduce the current ripple in accordance with the charging and discharging of VRFB and may increase the efficiency of the entire system. In this paper, it proposed bidirectional high-efficiency DC/DC converter topology Using multi-phase interleaved method and proved the validity through simulations and experiments.

An Area-efficient Implementation of Layered LDPC Decoder for IEEE 802.11n WLAN (IEEE 802.11n WLAN 표준용 Layered LDPC 복호기의 저면적 구현)

  • Jeong, Sang-Hyeok;Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.486-489
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    • 2010
  • This paper describes a layered LDPC decoder which supports block length of 1,944 bits and code rate 1/2 for IEEE 802.11n WLAN standard. To reduce the hardware complexity, the min-sum algorithm and layered architecture is adopted. A novel memory reduction technique suitable for min-sum algorithm reduces memory size by 75% compared with conventional method. The designed processor has 200,400 gates and 19,400 bits memory, and it is verified by FPGA implementation. The estimated throughput is about 200 Mbps at 120 MHz clock by using Xilinx Virtex-4 FPGA device.

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Dead time Compensation of Single-phase Grid-connected Inverter Using SOGI (SOGI를 이용한 단상 계통연계형 인버터의 데드타임 보상)

  • Seong, Ui-Seok;Lee, Jae-Suk;Hwang, Seon-Hwan;Kim, Jang-Mok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.22 no.2
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    • pp.166-174
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    • 2017
  • This study proposes a compensation method for the dead-time effects on a single-phase grid-connected inverter. Dead time should be considered in the pulse-width modulation gating signals to prevent the simultaneous conduction of switching devices, considering that a switching device has a finite switching time. Consequently, the output current of the grid-connected inverter contains odd-numbered harmonics because of the dead time and the nonlinear characteristics of the switching devices. The effects of dead time on output voltage and current are analyzed in this study. A new compensation algorithm based on second-order generalized integrator is also proposed to reduce the dead-time effect. Simulation and experimental results validate the effectiveness of the proposed compensation algorithm.

The performance dependency of the organic based solar cells on the variation in InZnSnO thickness

  • Choi, Kwang-Hyuk;Jeong, Jin-A;Park, Yong-Seok;Park, Ho-Kyun;Kim, Han-Ki
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.268-268
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    • 2010
  • The performance dependence of the P3HT:PCBM based bulk hetero-junction (BHJ) organic solar cells (OSCs) on the electrical and the optical properties of amorphous InZnSnO (a-IZTO) electrodes as a difference in film thicknesses are examined. With an increasing of the a-IZTO thickness, the series resistance ($R_{series}$) of the OSCs is reduced because of the reduction of sheet resistance ($R_{sheet}$) of a-IZTO electrodes. Additionally, It was found that the photocurrent density ($J_{sc}$) and the fill factor (FF) in OSCs are mainly affected by the electrical conductivity of the a-IZTO anode films rather than the optical transparency at thinner a-IZTO films. On the other hand, despite the much lower $R_{series}$ comes from thicker anode films, the dominant factor affecting the $J_{sc}$ became average optical transmittance of a-IZTO electrodes as well as power conversion efficiency (PCE) in same device configuration due to the thick anode films had as sufficiently low $R_{sheet}$ to extract the hole carrier from the active material.

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Evaluation on the Cooling Performance to Design Heat sinks for LED lightings (LED 조명용 히트싱크 방열기 설계를 위한 냉각성능 평가)

  • Jung, Tae-Sung;Kang, Hwan-Kook
    • Journal of the Korean Society for Precision Engineering
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    • v.29 no.7
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    • pp.778-784
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    • 2012
  • In comparison with some other light sources, LED has merits such as increased life expectancy, fast response, pollution free, and high energy efficiency. Lately, due to development of LED with high brightness and capacity, LED has widely used in many industrial fields such as automotive, aviation, display, transportation and special lighting applications. Since the high heat generation of LED chips can cause a reduction in lifetime, degradation of luminous efficiency, and variation of color temperature, studies have been carried out on the optimization of LED packaging and heat sinks. In this study, experiments on measuring the heat generation rate of LED and the cooling performance of a heat sink were carried for analyzing the thermal characteristics of LED lighting system in free convection. From the results, dimensionless correlation on the cooling performance of heat sink in natural convection was proposed with Nusselt number and Rayleigh number as a guideline for designing cooling device of LED lightings.