• Title/Summary/Keyword: Receiver$\Sigma\Delta$

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A 9 mW Highly-Digitized 802.15.4 Receiver Using Bandpass ∑Δ ADC and IF Level Detection

  • Kwon, Yong-Il;Park, Ta-Joon;Lee, Hai-Young
    • Journal of electromagnetic engineering and science
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    • v.8 no.2
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    • pp.76-83
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    • 2008
  • A low power(9 mW) highly-digitized 2.4 GHz receiver for sensor network applications(IEEE 802.15.4 LR-WPAN) is realized by a $0.18{\mu}m$ CMOS process. We adopted a novel receiver architecture adding an intermediate frequency (IF) level detection scheme to a low-power complex fifth-order continuous-time(CT) bandpass L:tl modulator in order to digitalize the receiver. By the continuous-time bandpass architecture, the proposed $\Sigma\Delta$ modulator requires no additional anti-aliasing filter in front of the modulator. Using the IF detector, the achieved dynamic range(DR) of the over-all system is 95 dB at a sampling rate of 64 MHz. This modulator has a bandwidth of 2 MHz centered at 2 MHz. The power consumption of this receiver is 9.0 mW with a 1.8 V power supply.

Tunable Bandpass 4th Order SC Sigma-delta Modulator with Novel Structure (새로운 구조의 Tunable 4차 SC Bandpass Sigma-Delta 변조기)

  • Kim, Jae-Bung;Yoo, Nam-Hee;Cho, Seong-Ik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.2
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    • pp.446-450
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    • 2011
  • Tunable SC(Switched Capacitor) bandpass ${\Sigma}-{\Delta}$(Sigma-Delta) modulator used in wireless system receiver occurs a signal attenuation according to tuning of center frequency in signal bandwidth. In this paper, tunable bandpass 4th order SC bandpass ${\Sigma}-{\Delta}$ modulator with novel structure is proposed for rejection of signal attenuation in signal bandwidth. The existing structure uses a ten variable coefficient values for rejection of signal reduction in the modulator. But the proposed structure only use a two variable coefficient values for rejection of signal attenuation in the modulator. Also, an adder and comparator is replaced with a comparator having 4 inputs in the modulator. Therefore, the existing structure has one more OP-AMP. The purposed modulator was designed in $0.18\;{\mu}m$ CMOS technology. The resolution of the modulator within 310 kHz bandwidth and 40 MHz sampling frequency under 6.67 MHz, 10 MHz and 13.33 MHz intermediate frequency are over 10 bit.

Performance and Jitter Effects Analysis of Single Bit Electro-Optical Sigma-Delta Modulators (단일 비트 전자-광학 시그마-델타 변조기의 성능 및 지터 효과 분석)

  • Nam, Chang-Ho;Ra, Sung-Woong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.6
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    • pp.706-715
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    • 2012
  • Electro-optical sigma-delta modulators are the core module of digital receiver to digitize wideband radio-frequency signals directly at an antenna. Electro-optical sigma-delta modulators use a pulsed laser to oversample an input radio-frequency signals at two Mach-Zehnder Interferometer(MZI) and shape the quantization noise using a fiber-lattice accumulator. Decimation filtering is applied to the quantizer output to construct the input signal with high resolution. The jitter affects greatly on reconstructing the original input signal of modulator. This paper analyzes the performance of first order single bit electro-optical sigma-delta modulator in the time domain and the frequency domain. The performance of modulator is analyzed by using asynchronous spectral averaging of the reconstructed signal's spectrum in the frequency domain. The reference value of time jitter is presented by analyzing the performance of jitter effects. This kind of jitter value can be used as a reference value on the design of modulators.

A Class-D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise

  • Lee, Dongjun;Noh, Jinho;Lee, Jisoo;Choi, Yongjae;Yoo, Changsik
    • ETRI Journal
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    • v.35 no.5
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    • pp.819-826
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    • 2013
  • A class-D audio amplifier for a digital hearing aid is described. The class-D amplifier operates with a pulse-code modulated (PCM) digital input and consists of an interpolation filter, a digital sigma-delta modulator (SDM), and an analog SDM, along with an H-bridge power switch. The noise of the power switch is suppressed by feeding it back to the input of the analog SDM. The interpolation filter removes the unwanted image tones of the PCM input, improving the linearity and power efficiency. The class-D amplifier is implemented in a 0.13-${\mu}m$ CMOS process. The maximum output power delivered to the receiver (speaker) is 1.19 mW. The measured total harmonic distortion plus noise is 0.015%, and the dynamic range is 86.0 dB. The class-D amplifier consumes 304 ${\mu}W$ from a 1.2-V power supply.

470-MHz-698-MHz IEEE 802.15.4m Compliant RF CMOS Transceiver

  • Seo, Youngho;Lee, Seungsik;Kim, Changwan
    • ETRI Journal
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    • v.40 no.2
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    • pp.167-179
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    • 2018
  • This paper proposes an IEEE 802.15.4m compliant TV white-space orthogonal frequency-division multiplexing (TVWS)-(OFDM) radio frequency (RF) transceiver that can be adopted in advanced metering infrastructures, universal remote controllers, smart factories, consumer electronics, and other areas. The proposed TVWS-OFDM RF transceiver consists of a receiver, a transmitter, a 25% duty-cycle local oscillator generator, and a delta-sigma fractional-N phase-locked loop. In the TV band from 470 MHz to 698 MHz, the highly linear RF transmitter protects the occupied TV signals, and the high-Q filtering RF receiver is tolerable to in-band interferers as strong as -20 dBm at a 3-MHz offset. The proposed TVWS-OFDM RF transceiver is fabricated using a $0.13-{\mu}m$ CMOS process, and consumes 47 mA in the Tx mode and 35 mA in the Rx mode. The fabricated chip shows a Tx average power of 0 dBm with an error-vector-magnitude of < 3%, and a sensitivity level of -103 dBm with a packet-error-rate of < 3%. Using the implemented TVWS-OFDM modules, a public demonstration of electricity metering was successfully carried out.

2nd-Order 3-Bit Delta-Sigma Modulator For Zero-IF Receivers using DWA algorithm (DWA알고리즘을 적용한 Zero-IF 수신기용 2차 3비트 델타-시그마 변조기)

  • Kim, Hui-Jun;Lee, Seung-Jin;Choe, Chi-Yeong;Choe, Pyeong
    • Proceedings of the KIEE Conference
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    • 2003.11b
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    • pp.75-78
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    • 2003
  • In this paper, a second-order 3-bit DSM using DWA(Data Weighted Averaging) algorithm is designed for bluetooth Zero-IF Receiver. The designed circuit has two integrators using a designed OTA, nonoverlapping two-phase clerk generator, 3-bit A/D converter, DWA algorithm and 3-bit D/A converter An ideal model of second-order lowpass DSM with a 3-bit quantizer was configured by using MATLAB, and each coefficients and design specification of each blocks were determined to have 10-bit resolution in 1MHz channel bandwidth. The designed second-order 3-blt lowpass DSM has maximum SNR of 74dB and power consumption is 50mW at 3.3V.

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Electrical Resistivity Imaging for Upper Layer of Shield TBM Tunnel Ceiling (쉴드 TBM터널 상부 지반 연약대 전기탐사)

  • Jung, Hyun-Key;Park, Chul-Hwan
    • Proceedings of the Korean Geotechical Society Conference
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    • 2005.03a
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    • pp.401-408
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    • 2005
  • Recently shield TBM tunnellings are being applied to subway construction in Korean cities. Generally these kinds of tunnellings have the problems in the stability of ground such as subsidence because urban subway is constructed in the shallow depth. A sinkhole occurred on the road just above the tunnel during tunneling in Kwangju, so a survey for upper layer of the tunnel was needed. But conventional Ground Probing Radar can't be applicable due to the presence of steel-mesh screen in the shield segment, so no existent geophysical method is applicable in this site. Because the outer surface of each shield segment is electrically insulated, dipole-dipole resistivity method which is popular in engineering site investigation, was tried to this survey for the first time. Specially manufactured flexible ring-type electrodes were installed into the grouting holes at an interval of 2.4 m on the ceiling. The K-Ohm II system which has been developed by KIGAM and tested successfully in many sites, was used in this site. The system consists of 1000Volt-1Ampere constant-current transmitter, optically isolated 24 bit sigma-delta A/D conversion receiver - maximum 12 channel simultaneous measurements, and graphical automatic acquisition software for easy data quality check in real time. Borehole camera logging with circular white LED lighting was also done to investigate the state of the layer. Measured resistivity data lack of some stations due to failing opening lids of holes, shows general high-low trend well. The dipole-dipole resistivity inversion results discriminate (1) one approximately 4 meter diameter cavity (grouted but incompletely hardened, so low resistivity - less than $30{\Omega}m$), (2) weak zone (100-200${\Omega}m$), and (3) hard zone (high resistivity - more than 1000${\Omega}m$) very well for the distance of 320 meters. The 2-D inversion neglects slight absolute 3-D effect, but we can get satisfactory and useful information. Acquired resistivity section and video tapes by borehole camera logging will be reserved and reused if some problem occurs in this site in the future.

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