• Title/Summary/Keyword: Real-time operating kernel

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Implementation of a general purpose embedded computer system (범용 내장형 컴퓨터 시스템의 구현)

  • Jang, Wee-Sik;Cho, Byeong-Heon;Sung, Yeong-Rak;Oh, Ha-Ryoung
    • The KIPS Transactions:PartA
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    • v.9A no.4
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    • pp.503-510
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    • 2002
  • In this paper, a general purpose embedded computer system is designed and implemented. The most crucial points of the system are extensibility and flexibility. The hardware of the developed system is composed of three modules and the software provides hardware independent application program interfaces. Moreover, uC/OS-II, a well-known open realtime kernel. is extended and ported onto the system. The extended uC/OS-II supports that multiple processes can have the same priority and such processes are scheduled in a round-robin manner.

A Methodology for Translation of Operating System Calls in Legacy Real-time Software to Ada (Legacy 실시간 소프트웨어의 운영체제 호출을 Ada로 번역하기 위한 방법론)

  • Lee, Moon-Kun
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.11
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    • pp.2874-2890
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    • 1997
  • This paper describes a methodology for translation of concurrent software expressed in operating system (OS) calls to Ada. Concurrency is expressed in some legacy software by OS calls that perform concurrent process/task control. Examples considered in this paper are calls in programs in C to Unix and calls in programs in CMS-2 to the Executive Service Routines of ATES or SDEX-20 other software re/reverse engineering research has focused on translating the OS calls in a legacy software to calls to another OS. In this approach, the understanding of software has required knowledge of the underlying OS, which is usually very complicated and informally documented. The research in this paper has focused on translating the OS calls in a legacy software into the equivalent protocols using the Ada facilities. In translation to Ada, these calls are represented by Ada equivalent code that follow the scheme of a message-based kernel oriented architecture. To facilitate translation, it utilizes templates placed in library for data structures, tasks, procedures, and messages. This methodology is a new approach to modeling OS in Ada in software re/reverse engineering. There is no need of knowledge of the underlying OS for software understanding in this approach, since the dependency on the OS in the legacy software is removed. It is portable and interoperable on Ada run-time environments. This approach can handle the OS calls in different legacy software systems.

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Efficient VLSI Architecture of Full-Image Guided Filter Based on Two-Pass Model (양방향 모델을 적용한 Full-image Guided Filter의 효율적인 VLSI 구조)

  • Lee, Gyeore;Park, Taegeun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.11
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    • pp.1507-1514
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    • 2016
  • Full-image guided filter reflects all pixels of image in filtering by using weight propagation and two-pass model, whereas the existing guide filter is processed based on the kernel window. Therefore the computational complexity can be improved while maintaining characteristics of guide filter, such as edge-preserving, smoothing, and so on. In this paper, we propose an efficient VLSI architecture for the full-image guided filter by analyzing the data dependency, the data frequency and the PSNR analysis of the image in order to achieve enough speed for various applications such as stereo vision, real-time systems, etc. In addition, the proposed efficient scheduling enables the realtime process by minimizing the idle period in weight computation. The proposed VLSI architecture shows 214MHz of maximum operating frequency (image size: 384*288, 965 fps) and 76K of gates (internal memory excluded).

Implementation of an Embedded System for Image Tracking Using Web Camera (ICCAS 2005)

  • Nam, Chul;Ha, Kwan-Yong;;Kim, Hie-Sik
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.1405-1408
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    • 2005
  • An embedded system has been applied to many fields including households and industrial sites. In the past, user interface products with simple functions were commercialized .but now user demands are increasing and the system has more various applicable fields due to a high penetration rate of the Internet. Therefore, the demand for embedded system is tend to rise In this paper, we Implementation of an embedded system for image tracking. This system is used a fixed IP for the reliable server operation on TCP/IP networks. A real time broadcasting of video image on the internet was developed by using an USB camera on the embedded Linux system. The digital camera is connected at the USB host port of the embedded board. all input images from the video camera is continuously stored as a compressed JPEG file in a directory at the Linux web-server. And each frame image data from web camera is compared for measurement of displacement Vector. That used Block matching algorithm and edge detection algorithm for past speed. And the displacement vector is used at pan/tilt motor control through RS232 serial cable. The embedded board utilized the S3C2410 MPU Which used the ARM 920T core form Samsung. The operating system was ported to embedded Linux kernel and mounted of root file system. And the stored images are sent to the client PC through the web browser. It used the network function of Linux and it developed a program with protocol of the TCP/IP.

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Hardware Design of Bilateral Filter Based on Window Division (윈도우 분할 기반 양방향 필터의 하드웨어 설계)

  • Hyun, Yongho;Park, Taegeun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.12
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    • pp.1844-1850
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    • 2016
  • The bilateral filter can reduce the noise while preserving details computing the filtering output at each pixels as the average of neighboring pixels. In this paper, we propose a real-time system based on window division. Overall performance is increased due to the parallel architectures which computes five rows in the kernel window simultaneously but with pipelined scheduling. We consider the tradeoff between the filter performance and the hardware cost and the bit allocation has been determined by PSNR analysis. The proposed architecture is designed with verilogHDL and synthesized using Dongbu Hitek 110nm standard cell library. The proposed architecture shows 416Mpixels/s (397fps) of throughput at 416MHz of operating frequency with 132K gates.