• 한국멀티미디어학회논문지
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• 제25권2호
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• pp.325-334
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• 2022

Digital twin has the advantages of quality improvement and cost reduction, so it is widely applied to various industries. In this paper, a method to implement the major technologies of digital twin easily and quickly is presented. These include data management and relay servers, real-time monitoring applications including remote control interfaces, and direct connection protocols for video streaming. In addition, an algorithm for controlling a two-wheeled vehicle with a 2D interface is also proposed. The implemented system performs near real-time synchronization between the real environment and the virtual space. The delay time that occurs in remote control of the vehicle in the real environment was compared with the results of applying the proposed delay time reduction method. In addition, in the case of 2D interface-based control, an algorithm that can guarantee the user experience was implemented and applied to the actual environment and verified through experiments.

• IEIE Transactions on Smart Processing and Computing
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• 제4권4호
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• pp.237-250
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• 2015

This paper describes a hardware-oriented algorithm and its conceptual implementation in a real-time speed limit traffic sign detection system on an automotive-oriented field-programmable gate array (FPGA). It solves the training and color dependence problems found in other research, which saw reduced recognition accuracy under unlearned conditions when color has changed. The algorithm is applicable to various platforms, such as color or grayscale cameras, high-resolution (4K) or low-resolution (VGA) cameras, and high-end or low-end FPGAs. It is also robust under various conditions, such as daytime, night time, and on rainy nights, and is adaptable to various countries' speed limit traffic sign systems. The speed limit traffic sign candidates on each grayscale video frame are detected through two simple computational stages using global luminosity and local pixel direction. Pipeline implementation using results-sharing on overlap, application of a RAM-based shift register, and optimization of scan window sizes results in a small but high-performance implementation. The proposed system matches the processing speed requirement for a 60 fps system. The speed limit traffic sign recognition system achieves better than 98% accuracy in detection and recognition, even under difficult conditions such as rainy nights, and is implementable on the low-end, low-cost Xilinx Zynq automotive Z7020 FPGA.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제12권2호
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• pp.829-842
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• 2018

Unmanned Aerial Vehicle (UAV) is diversely utilized in our lives such as daily hobbies, specialized video image taking and disaster prevention activities. New ways of UAV application have been explored recently such as UAV-based delivery. However, most UAV systems are being utilized in a passive form such as real-time video image monitoring, filmed image ground analysis and storage. For more proactive UAV utilization, there should be higher-performance UAV and large-capacity memory than those presently utilized. Against this backdrop, this study described the general matters on proactive software platform and high-performance UAV hardware for real-time target tracking; implemented research on its design and implementation, and described its implementation method. Moreover, in its established platform, this study measured and analyzed the core-specific CPU consumption.

• 음성과학
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• 제7권2호
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• pp.225-234
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• 2000

This paper describes the fixed-point DSP implementation of a CELP(Code-excited linear prediction)-based speech coder. The effective realization methodologies to maximize the utilization of the DSP's architectural features, specifically parallel movement and pipelining are also presented together with the implementation results targeted for the ITU-T standard G.723.1 using Motorola DSP56362. The operation of the implemented speech coder is verified using the test vectors offered by the standard as well as using the peripheral interface circuits designed for the coder's real-time operation.

• 대한전기학회논문지
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• 제41권3호
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• pp.281-291
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• 1992

This paper deals with the digital autopilot implementation for a launch vehicle. We propose a hardware and software system for digital autopilot implemented by microprocessor. The hardware system designed in this paper consists of CPU and memory board with 80286 MPU and 80287 NPU and I/O interface with A/D and D/A converters. The software system developed is composed of power-on self-test program, initializing program, interrupt service program, and control program. The performance of the overall system controlled by the digital autopilot implemented in this paper is evaluated via real-time simulations, which show that the control performances are satisfactory.

• 한국통신학회논문지
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• 제28권1C호
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• pp.24-31
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• 2003

In this paper, a new opto-digital multiple information hiding and real-time extracting system is implemented. That is, multiple information is hidden in a cover image by using the stego keys which are generated by combined use of random sequence(RS) and Hadamard matrix(HM) and these hidden information is extracted in real-time by using a new optical correlator-based extraction system. In the experiment, 3 kinds of information, English alphabet of "N", "R", "L" having 512$\times$512 pixels, are formulated 8$\times$8 blocks and each of these information is multiplied with the corresponding stego keys having 64$\times$64 pixels one by one. And then, by adding these modulated data to a cover image of "Lena"having 512$\times$512 pixels, a stego image is finally generated. In this paper, as an extraction system, a new optical nonlinear joint transform correlator(NJTC) is introduced to extract the hidden data from a stego image in real-time, in which optical correlation between the stego image and each of the stego keys is performed and from these correlation outputs the hidden data can be asily exacted in real-time. Especially, it is found that the SNRs of the correlation outputs in the proposed optical NJTC-based extraction system has been improved to 7㏈ on average by comparison with those of the conventional JTC system under the condition of having a nonlinear parameter less than k=0.4. This good experimental results might suggest a possibility of implementation of an opto-digital multiple information hiding and real-time extracting system.

• 한국항공우주학회지
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• 제39권11호
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• pp.1060-1068
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• 2011

본 논문에서는 실시간 운영체제(Real Time Operating System, RTOS)기반의 실시간 임베디드 시스템용 자바 가상 머신(Jamaica Virtual Machine, JVM)을 이용한 비행운용 프로그램(Operational Flight Program, OFP)의 객체 지향적 개발사례에 대해 기술하였다. 국산화 임무 컴퓨터(Mission Computer, MC)에는 다기능 시현(Multi Functional Display, MFD), 통합 전방 상향 제어(Integrated Up-Front Control, IUFC), 전방 시현(Head-Up Display, HUD) 및 화력 제어(Fire Control, FC)를 지원하는 OFP가 각각의 프로세스에 탑재되어 구동되는데, 본 논문에서는 자바(Java) 기반의 MFD OFP(다기능 시현기에 조종사 참고 정보를 제공하는 비행운용 프로그램)와 미들웨어의 설계 및 구현에 대하여 기술하였다.

• 한국항해항만학회지
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• 제27권1호
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• pp.87-95
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• 2003

해저 광테이블 공사는 해양조사, PLGR(Pre Lay Grapnel Run), 천해부공사, 포설/매설 순서로 이루어진다. PLGR은 케이블의 해저면 안착을 용이하게 하고, Plough 및 ROV(Remotely-Operated Vehicle)매설작업의 성능을 향상시키며, 매설 장비를 보호하기 위한 작업이다. 본 논문은 해저 광테이블 건설 작업 중에서 PLGR 작업을 효율적으로 관리할 수 있는 실시간 모니터링 시스템의 설계 및 구현에 대해서 논한다. 본 논문에서는 이를 위하여 전체적인 실시간 모니터링 시스템을 설계하고, 시리얼 멀티포트 통신 모듈, 실시간 처리 모듈, 환경 설정 모듈, 그리고 그래프 및 프린터 출력 모듈을 설계 및 구현하였다. 끝으로 본 논문의 타당성 검토를 위하여 시리얼 멀티포트 통신, 실시간 데이터 추출, 그래프 출력을 실험하였다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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• pp.828-831
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• 1997

One of the most important design factor for the image tracker is the speed of the data processing which allows real-time operation of the system and provides reasonably accurate performance at the same time. Use of powerful DSP alone does not guarantee to meet such requirement. In this paper, a simple efficient algorithm for real-time multi-target image tracking is suggested. The suggested method is based on a recursive centroiding technique and color table look-up. This method has been successfully implemented in a image processing system for Micro-Robot Soccer Tournament(MIROSOT). This tracker can track positions of a ball, 3 enemies, and 3 agents at the same time. The experimental results show that the processing time for each frame of image is less than 7ms, which is well within the 60Hz sampling interval for real-time operation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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• pp.336-338
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• 2006

One of the important topics concerning the safety of electrical and electronic system is the reliability of the wiring system. The Time-Frequency Domain Reflectometry(TFDR) is a state-of-the-art system for detection and estimation of the fault on a wiring/cable. The purpose of this paper is to implement a Labview based TFDR Real Time system though the instruments of PCI extensions for Instrumentation(PXI). The TFDR Real Time system consists of the five parts: Reference signal design, signal generation, signal acquisition, algorithm execution, results diplay part. In the signal generation and acquisition parts we adopt the Arbitrary Waveform Generator(AWG) and Digital Storage Oscilloscope(DSO) PXI modules which offer commonality, compatibility and easy integration at low cost. And execution of the PXI modules not only is controlled by the Labview programing but also the total system process is executed by the Labview application software.