• Current Optics and Photonics
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• 제2권5호
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• pp.453-459
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• 2018

We have developed a high-performance signal-processing and image-rendering heterogeneous computation system for optical coherence tomography (OCT) on mobile processor. In this paper, we reveal it by demonstrating real-time OCT image processing using a Snapdragon 800 mobile processor, with the introduction of a heterogeneous image visualization architecture (HIVA) to accelerate the signal-processing and image-visualization procedures. HIVA has been designed to maximize the computational performances of a mobile processor by using a native language compiler, which targets mobile processor, to directly access mobile-processor computing resources and the open computing language (OpenCL) for heterogeneous computation. The developed mobile image processing platform requires only 25 ms to produce an OCT image from $512{\times}1024$ OCT data. This is 617 times faster than the naïve approach without HIVA, which requires more than 15 s. The developed platform can produce 40 OCT images per second, to facilitate real-time mobile OCT image visualization. We believe this study would facilitate the development of portable diagnostic image visualization with medical imaging modality, which requires computationally expensive procedures, using a mobile processor.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.1032-1036
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• 1990

This paper describes a system which enables a real-time measurement of 2-D water flow field. One distinctive feature of our system is that velocity vectors of water flow are obtained from the movement of tracer particles at video rate. In order to enable a fast measurement a real time video processor and two Digital Signal Processor(TMS32OC25) are employed. The real-time video processor extracts contours of tracer particles in order to reduce the amount of image data to be processed. And two DSP(Digital Signal Processor) analyse the correlation of every tracer paticle in the consecutive two images to obtain the velocity distribution of water flow.

• 제어로봇시스템학회논문지
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• 제11권1호
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• pp.84-91
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• 2005

In this paper, we describe the real-time parallel processing simulator developed for the use of performance analysis of rolling missiles. The real-time parallel processing simulator developed here consists of seeker emulator generating infrared image signal on aircraft, real-time computer, host computer, system unit, and actual equipments such as auto-pilot processor and seeker processor. Software is developed from mathematic models, 6 degree-of-freedom module, aerodynamic module which are resided in real-time computer, and graphic user interface program resided in host computer. The real-time computer consists of six TIC-40 processors connected in parallel. The seeker emulator is designed by using analog circuits coupled with mechanical equipments. The system unit provides interface function to match impedance between the components and processes very small electrical signals. Also real launch unit of missiles is interfaced to simulator through system unit. In order to apply the real-time parallel processing simulator to performance analysis equipment of rolling missiles it is essential to perform the performance verification test of simulator.

• 한국항해학회지
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• 제24권5호
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• pp.435-441
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• 2000

This paper deals with the development of RACOM(Radar Signal Detecting ＆ Processing Computer). RACOM is a radar display system specially designed for radar scan conversion, signal processing and PCI radar image display. RACOM contains two components； i )RSP(Radar Signal Processor) board which is a PCI based board for receiving video, trigger, heading & bearing signals from radar scanner ＆ tranceiver units and processing these signals to generate high resolution radar image, and ⅱ）Applications which perform ordinary radar display functions such as EBL, VRM and so on. Since RACOM is designed to meet a wide variety of specifications(type of output signal from tranceiver unit), to record radar images and to distribute those images in real time to everywhere in a networked environment, it can be applicable to AIS(Automatic Identification System) and VDR(Voyage Data Recorder).

• 전자공학회논문지B
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• 제32B권8호
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• pp.1085-1090
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• 1995

The Discrete Cosine Transform(DCT) is effective technique for image compression, which is widely used in the area of digital signal processing. In this paper, an efficient DCT processor is proposed and simulated by using Verilog HDL. This algorithm is improved 60% in processing speed, but it's somewhat complicate compared with Y. Arai's algorithm. This algorithm will be used efficiently for real time image processing.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국제학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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• pp.822-825
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• 1988

In this paper, we present a system which enables a real-time measurement of the number and also the body length of the fry (baby fish) using a line image sensor. Here, we consider a situation that fry are transported from a pond to another, pond through a pipe. At one position of the pipe a transparent rectanglar channel is mounted. The images of the fry, which run through this rectanglar channel, are detected by a line image sensor. The image signals are digitized to binary ones and the contour of the fry are detected. After that, a real-time image analysis is executed with a digital signal processor. Labeling program analyses the connection of every pixel. The results are transfered to a personal computer and displayed on the online monitor graphically.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 1999년도 추계학술대회 논문집 - 한국공작기계학회
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• pp.119-124
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• 1999

This paper presents new approach to technology pattern recognition of camera back cover and test of soldering. In real-time implementing of pattern recognition camera back cover and test of soldering, the MVB-03 vision board has been used. Image can be captured from standard CCD monochrome camera in resolutions up to 640$\times$480 pixels. Various options re available for color cameras, a synchronous camera reset, and linescan cameras. Image processing os performed using Texas Instruments TMS320C31 digital signal processors. Image display is via a standard composite video monitor and supports non-destructive color overlay. System processing is possible using c30 machine code. Application software can be written in Borland C++ or Visual C++

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅲ
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• pp.1685-1688
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• 2003

The modem multimedia applications which are video Processor, video conference or video phone and so forth require real time processing. Because of a large amount of image data, those require high compression performance. In this paper, the proposed image processing encoder was designed by using wavelet transform encoding. The proposed filter block can process image data on tile high speed because of composing individual function blocks by parallel and compute both highpass and lowpass coefficient in the same clock cycle. When image data is decomposed into multiresolution, the proposed scheme needs external memory and controller to save intermediate results and it can operate within 33㎒.

• 한국컴퓨터정보학회논문지
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• 제21권11호
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• pp.1-7
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• 2016

In this paper, we proposed real-time relative radiometric calibration processing method for SWIR(Short Wavelength Infra-Red) sensor using 'Hyper-Spectral Imager'. Until now domestic research for Hyper-Spectral Imager has been performing with foreign sensor device. So we have been studying hyper spectral sensor device to meet domestic requirement, especially military purpose. To improve detection & identify capability in 'Hyper-Spectral Imager', it is necessary to expend sensing wavelength from visual and NIR(Near Infra-Red) to SWIR. We aimed to design real-time processor for SWIR sensor which can control the sensor ROIC(Read-Out IC) and process calibrate the image. To build Hyper-Spectral sensor device, we will review the SWIR sensor and its signal processing board. And we will analyze relative radiometric calibration processing method and result. We will explain several SWIR sensors, our target sensor and its control method, steps for acquisition of reference images and processing result.

• 한국통신학회논문지
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• 제36권12C호
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• pp.727-737
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• 2011

본 논문에서는 FPGA(Field Programmable Gate Array)와 DSP(Digital Signal Processor)를 이용하는 실시간 차선 및 차량인식 시스템의 구현에 대하여 기술한다. 실시간 시스템의 구현을 위해서 FPGA와 DSP의 역할을 효율적으로 분할할 필요성이 있다. 시스템의 알고리즘을 특정요소 추출부분을 기준으로 분할하여 대량의 영상정보를 이용하여 소량의 특정요소를 추출하는 과정을 FPGA로 구현하고 추출된 특정요소를 사용하여 차선과 차량을 정의하고 추적하는 부분을 DSP에서 수행하게 하고, FPGA와 DSP의 효율적 연동을 위한 인터페이스 구성을 제안함으로써 실시간 처리가 가능한 시스템 구조를 제안한다. 실험 결과 제안한 실시간 차선 및 차량인식 시스템은 $640{\times}480$ 크기를 갖는 비디오 영상 입력에 대해 약 15 (frames/sec)로 동작하여 실시간 응용으로 충분함을 알 수 있다.