• Title/Summary/Keyword: Real-Time image signal processor

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Heterogeneous Computation on Mobile Processor for Real-time Signal Processing and Visualization of Optical Coherence Tomography Images

  • Aum, Jaehong;Kim, Ji-hyun;Dong, Sunghee;Jeong, Jichai
    • Current Optics and Photonics
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    • v.2 no.5
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    • pp.453-459
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    • 2018
  • We have developed a high-performance signal-processing and image-rendering heterogeneous computation system for optical coherence tomography (OCT) on mobile processor. In this paper, we reveal it by demonstrating real-time OCT image processing using a Snapdragon 800 mobile processor, with the introduction of a heterogeneous image visualization architecture (HIVA) to accelerate the signal-processing and image-visualization procedures. HIVA has been designed to maximize the computational performances of a mobile processor by using a native language compiler, which targets mobile processor, to directly access mobile-processor computing resources and the open computing language (OpenCL) for heterogeneous computation. The developed mobile image processing platform requires only 25 ms to produce an OCT image from $512{\times}1024$ OCT data. This is 617 times faster than the naïve approach without HIVA, which requires more than 15 s. The developed platform can produce 40 OCT images per second, to facilitate real-time mobile OCT image visualization. We believe this study would facilitate the development of portable diagnostic image visualization with medical imaging modality, which requires computationally expensive procedures, using a mobile processor.

Real-time measurement of velocity distribution of water flow

  • Kawasue, K.;Ishimatsu, T.
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10b
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    • pp.1032-1036
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    • 1990
  • This paper describes a system which enables a real-time measurement of 2-D water flow field. One distinctive feature of our system is that velocity vectors of water flow are obtained from the movement of tracer particles at video rate. In order to enable a fast measurement a real time video processor and two Digital Signal Processor(TMS32OC25) are employed. The real-time video processor extracts contours of tracer particles in order to reduce the amount of image data to be processed. And two DSP(Digital Signal Processor) analyse the correlation of every tracer paticle in the consecutive two images to obtain the velocity distribution of water flow.

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Study on Real-time Parallel Processing Simulator for Performance Analysis of Missiles (유도탄 성능분석을 위한 실시간 병렬처리 시뮬레이터 연구)

  • Kim Byeong-Moon;Jung Soon-Key
    • Journal of Institute of Control, Robotics and Systems
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    • v.11 no.1
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    • pp.84-91
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    • 2005
  • In this paper, we describe the real-time parallel processing simulator developed for the use of performance analysis of rolling missiles. The real-time parallel processing simulator developed here consists of seeker emulator generating infrared image signal on aircraft, real-time computer, host computer, system unit, and actual equipments such as auto-pilot processor and seeker processor. Software is developed from mathematic models, 6 degree-of-freedom module, aerodynamic module which are resided in real-time computer, and graphic user interface program resided in host computer. The real-time computer consists of six TIC-40 processors connected in parallel. The seeker emulator is designed by using analog circuits coupled with mechanical equipments. The system unit provides interface function to match impedance between the components and processes very small electrical signals. Also real launch unit of missiles is interfaced to simulator through system unit. In order to apply the real-time parallel processing simulator to performance analysis equipment of rolling missiles it is essential to perform the performance verification test of simulator.

A Study on the Development of Radar Signal Detecting & Processor (Radar Signal Detecting & Processing 장치의 개발에 관한 연구)

  • 송재욱
    • Journal of the Korean Institute of Navigation
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    • v.24 no.5
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    • pp.435-441
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    • 2000
  • This paper deals with the development of RACOM(Radar Signal Detecting & Processing Computer). RACOM is a radar display system specially designed for radar scan conversion, signal processing and PCI radar image display. RACOM contains two components; i )RSP(Radar Signal Processor) board which is a PCI based board for receiving video, trigger, heading & bearing signals from radar scanner & tranceiver units and processing these signals to generate high resolution radar image, and ⅱ)Applications which perform ordinary radar display functions such as EBL, VRM and so on. Since RACOM is designed to meet a wide variety of specifications(type of output signal from tranceiver unit), to record radar images and to distribute those images in real time to everywhere in a networked environment, it can be applicable to AIS(Automatic Identification System) and VDR(Voyage Data Recorder).

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A Development of a high speed DCT parallel processor (고속 DCT 병렬처리기의 개발)

  • 박종원;유기현
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.8
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    • pp.1085-1090
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    • 1995
  • The Discrete Cosine Transform(DCT) is effective technique for image compression, which is widely used in the area of digital signal processing. In this paper, an efficient DCT processor is proposed and simulated by using Verilog HDL. This algorithm is improved 60% in processing speed, but it's somewhat complicate compared with Y. Arai's algorithm. This algorithm will be used efficiently for real time image processing.

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Real-Time Measurement of Fry in the Cultivation Field Using a Line-Image Sensora

  • Ishimatsu, T.;Kawasue, K.;Kumon, T.;Ochiai, T.
    • 제어로봇시스템학회:학술대회논문집
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    • 1988.10b
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    • pp.822-825
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    • 1988
  • In this paper, we present a system which enables a real-time measurement of the number and also the body length of the fry (baby fish) using a line image sensor. Here, we consider a situation that fry are transported from a pond to another, pond through a pipe. At one position of the pipe a transparent rectanglar channel is mounted. The images of the fry, which run through this rectanglar channel, are detected by a line image sensor. The image signals are digitized to binary ones and the contour of the fry are detected. After that, a real-time image analysis is executed with a digital signal processor. Labeling program analyses the connection of every pixel. The results are transfered to a personal computer and displayed on the online monitor graphically.

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Development of Vision Technology for the Test of Soldering and Pattern Recognition of Camera Back Cover (카메라 Back Cover의 형상인식 및 납땜 검사용 Vision 기술 개발)

  • 장영희
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1999.10a
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    • pp.119-124
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    • 1999
  • This paper presents new approach to technology pattern recognition of camera back cover and test of soldering. In real-time implementing of pattern recognition camera back cover and test of soldering, the MVB-03 vision board has been used. Image can be captured from standard CCD monochrome camera in resolutions up to 640$\times$480 pixels. Various options re available for color cameras, a synchronous camera reset, and linescan cameras. Image processing os performed using Texas Instruments TMS320C31 digital signal processors. Image display is via a standard composite video monitor and supports non-destructive color overlay. System processing is possible using c30 machine code. Application software can be written in Borland C++ or Visual C++

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A Design of Discrete Wavelet Transform Encoder for Multimedia Image Signal Processing (멀티미디어 영상신호 처리를 위한 DWT 부호화기 설계)

  • 이강현
    • Proceedings of the IEEK Conference
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    • 2003.07d
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    • pp.1685-1688
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    • 2003
  • The modem multimedia applications which are video Processor, video conference or video phone and so forth require real time processing. Because of a large amount of image data, those require high compression performance. In this paper, the proposed image processing encoder was designed by using wavelet transform encoding. The proposed filter block can process image data on tile high speed because of composing individual function blocks by parallel and compute both highpass and lowpass coefficient in the same clock cycle. When image data is decomposed into multiresolution, the proposed scheme needs external memory and controller to save intermediate results and it can operate within 33㎒.

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Real Time Relative Radiometric Calibration Processing of Short Wave Infra-Red Sensor for Hyper Spectral Imager

  • Yang, Jeong-Gyu;Park, Hee-Duk
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.11
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    • pp.1-7
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    • 2016
  • In this paper, we proposed real-time relative radiometric calibration processing method for SWIR(Short Wavelength Infra-Red) sensor using 'Hyper-Spectral Imager'. Until now domestic research for Hyper-Spectral Imager has been performing with foreign sensor device. So we have been studying hyper spectral sensor device to meet domestic requirement, especially military purpose. To improve detection & identify capability in 'Hyper-Spectral Imager', it is necessary to expend sensing wavelength from visual and NIR(Near Infra-Red) to SWIR. We aimed to design real-time processor for SWIR sensor which can control the sensor ROIC(Read-Out IC) and process calibrate the image. To build Hyper-Spectral sensor device, we will review the SWIR sensor and its signal processing board. And we will analyze relative radiometric calibration processing method and result. We will explain several SWIR sensors, our target sensor and its control method, steps for acquisition of reference images and processing result.

FPGA-DSP Based Implementation of Lane and Vehicle Detection (FPGA와 DSP를 이용한 실시간 차선 및 차량인식 시스템 구현)

  • Kim, Il-Ho;Kim, Gyeong-Hwan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.12C
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    • pp.727-737
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    • 2011
  • This paper presents an implementation scheme of real-time lane and vehicle detection system with FPGA and DSP. In this type of implementation, defining the functionality of each device in efficient manner is of crucial importance. The FPGA is in charge of extracting features from input image sequences in reduced form, and the features are provided to the DSP so that tracking lanes and vehicles are performed based on them. In addition, a way of seamless interconnection between those devices is presented. The experimental results show that the system is able to process at least 15 frames per second for video image sequences with size of $640{\times}480$.