• International Journal of Automotive Technology
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• v.5 no.4
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• pp.269-276
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• 2004

There has been considerable activity in recent years in developing timing analysis algorithms for distributed real-time control systems. However, it is difficult for control engineers to analyze the timing behavior of distributed real-time control systems because the algorithms was developed in a software engineer's position and the calculation of the algorithm is very complex. Therefore, there is a need to develop a timing analysis tool, which can handle the calculation complexity of the timing analysis algorithms in order to help control engineers easily analyze or develop the distributed real-time control systems. In this paper, an interactive timing analysis tool, called RAT (Response-time Analysis Tool), is introduced. RAT can perform the schedulability analysis for development of distributed real-time control systems. The schedulability analysis can verify whether all real-time tasks and messages in a system will be completed by their deadlines in the system design phase. Furthermore, from the viewpoint of end-to-end scheduling, RAT can perform the schedulability analysis for series of tasks and messages in a precedence relationship.

• Journal of Korea Multimedia Society
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• v.25 no.4
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• pp.559-567
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• 2022

The optimal shipping location is determined by measuring the volume and weights of cargo shipped to non-standard cargo carriers. Currently, workers manually measure cargo volume, but automate it to improve work inefficiency. In this paper, we proposed the method of a real-time volume calculation using LiDar sensor for automating cargo measurement of non-standard cargo. For this purpose, we utilized the statistical techniques for data preprocessing and volume calculation, also used Voxel Grid filter to light weighted of data which are appropriate in real-time calculation. We implemented the function of Normal vectors and Triangle Mesh to generate surfaces and Alpha Shapes algorithms to process 3D modeling.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.124-129
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• 2013

This paper proposes a high-performance vector inner product calculation circuit for real-time object recognition based on SVM algorithm. SVM algorithm shows a higher detection rate than other object recognition algorithms. However, it requires a huge amount of computational efforts. Since vector inner product calculation is one of the major operations of SVM algorithm, it is important to implement a high-performance vector inner product calculation circuit for real-time object recognition capability. The proposed circuit adopts the pipeline architecture with six stages to increase the operating speed and makes it possible to recognize objects in real time based on SVM. The proposed circuit was described in Verilog HDL at RTL. For silicon verification, an MPW chip was fabricated using TSMC 180nm standard cell library. The operation of the implemented MPW chip was verified on the test board with test application software developed for the chip verification.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.1
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• pp.201-220
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• 2020

Trackers, especially long-term (LT) trackers, now have a more complex structure and more intensive computation for nowadays' endless pursuit of high accuracy and robustness. However, computing efficiency of LT trackers cannot meet the real-time requirement in various real application scenarios. Considering heterogeneous CPU-GPU platforms have been more popular than ever, it is a challenge to exploit the computing capacity of heterogeneous platform to improve the efficiency of LT trackers for real-time requirement. This paper focuses on TLD, which is the first LT tracking framework, and proposes an efficient parallel implementation based on OpenCL. In this paper, we firstly make an analysis of the TLD tracker and then optimize the computing intensive kernels, including Fern Feature Extraction, Fern Classification, NCC Calculation, Overlaps Calculation, Positive and Negative Samples Extraction. Experimental results demonstrate that our efficient parallel TLD tracker outperforms the original TLD, achieving the 3.92 speedup on CPU and GPU. Moreover, the parallel TLD tracker can run 52.9 frames per second and meet the real-time requirement.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.488-491
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• 1997

The PMGS(Plant Model Generating System) was developed based on modular modeling method and fluid network calculation concept. Fluid network calculation is used as a method of real-time computation of fluid network, and the module which has a topology with node and branch is defined to take advantages of modular modeling. Also, the database which have a shared memory as an instance is designed to manage simulation data in real-time. The applicability of the PMGS was examined implementing the HRSG(Heat Recovery Steam Generator) control logic on DCS.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1999.06a
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• pp.219-226
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• 1999

Recently a study of Virtual-Reality becomes active. Expectation to 3-D reproduction technology rises with it. Electro-holography using Spatial light modulator (SLM) attracts attention, because natural 3-D animated image is provided. In this paper recent development of 3D-TV by Electro-holography is reported. We consider the conditions to holographic TV such as input, transmission and display systems. Also we consider about fast hologram calculation because It is important to execute hologram calculation at high speed to realize the real time electro-holography. Then we consider the possibility of real time holography.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1998.06b
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• pp.63-66
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• 1998

Recently, a study of Virtual-Reality becomes active. Expectation to 3-D reproduction technology rises with it. Electro-holography using Spatial-light-modulator attracts attention, because natural 3-D animated image is provided. It is important to execute hologram calculation at high speed to realize the real time electro-holography. In other words, a higher-speed computer and a study of calculation algorithm becomes an important subject. This time, we realized to fast calculation of Fresnel-Hologram by networking technology.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2296-2300
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• 2005

This paper deals with the real-time message network system by a CAN (controller area network) based on the real-time distributed control scheme to integrate actuators and sensors in a humanoid robot. In order to apply the real-time distributed processing for a humanoid robot, each control unit should have the real-time efficient control method, fast sensing method, fast calculation and real-time valid data exchange method. Moreover, the data from sensors and encoders must be transmitted to the higher level of control units in maximum time limit. This paper describes the real-time message network system design and the performance of the system.

• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.116-118
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• 1997

The moving average filter in this paper, which has robust performance to the noise and can be easily implementable in hardware, is modified in view of real-time processing of the focus value. The simple hardware configurations are implemented to calculate the focus value in real-time. The stable controller of focus lens actuated by motors are designed. The hardware which are composed of EPLD, cheap vision chips, and CPU etc. are designed to perform the real-time calculation of focus value.

• Proceedings of the Korea Multimedia Society Conference
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• 2003.11b
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• pp.1006-1009
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• 2003

In a motion estimation method for use in encoding a moving picture, a full-pixel motion vector is estimated by stochastically sampling a pixel to be processed in a predetermined-sized block of a previous frame or a next frame as a reference frame for each of a plurality of equal-sized blocks in a current frame. Then, a half-pixel motion vector is estimated based on the full-pixel motion vector. Accordingly, both the calculation amount and the calculation time required for the motion estimation are effectively reduced. Further, it can be prevented that the hardware becomes complicated. .