• Title/Summary/Keyword: Rapid thermal annealing process

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A Study on the Mask Fabrication Process for X-ray Lithography (X-선 노광용 마스크 제작공정에 관한 연구)

  • 박창모;우상균;이승윤;안진호
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.2
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    • pp.1-6
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    • 2000
  • X-ray lithography mask with SiC membrane and Ta absorber patterns has been fabricated using ECR plasma CVD, d.c. magnetron sputtering, and ECR plasma etching. The stress of stoichiometric SiC film was adjusted by rapid thermal annealing under $N_2$, ambient. Adjusting the working pressure during sputtering process resulted in a near-zero residual stress, reasonable density, and smooth surface morphology of Ta film. Cl-based plasma showed a good etching characteristics of Ta, and two-step etching process was implemented to suppress microloading effect fur sub-quarter $\mu\textrm{m}$ patterning.

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Optimization of Ohmic Contact Metallization Process for AlGaN/GaN High Electron Mobility Transistor

  • Wang, Cong;Cho, Sung-Jin;Kim, Nam-Young
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.1
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    • pp.32-35
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    • 2013
  • In this paper, a manufacturing process was developed for fabricating high-quality AlGaN/GaN high electron mobility transistors (HEMTs) on silicon carbide (SiC) substrates. Various conditions and processing methods regarding the ohmic contact and pre-metal-deposition $BCl_3$ etching processes were evaluated in terms of the device performance. In order to obtain a good ohmic contact performance, we tested a Ti/Al/Ta/Au ohmic contact metallization scheme under different rapid thermal annealing (RTA) temperature and time. A $BCl_3$-based reactive-ion etching (RIE) method was performed before the ohmic metallization, since this approach was shown to produce a better ohmic contact compared to the as-fabricated HEMTs. A HEMT with a 0.5 ${\mu}m$ gate length was fabricated using this novel manufacturing process, which exhibits a maximum drain current density of 720 mA/mm and a peak transconductance of 235 mS/mm. The X-band output power density was 6.4 W/mm with a 53% power added efficiency (PAE).

The Characteristics of High Temperature Crystallized Poly-Si for Thin Film Transistor Application (박막트랜지스터 응용을 위한 고온 결정화된 다결정실리콘의 특성평가)

  • 김도영;심명석;서창기;이준신
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.5
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    • pp.237-241
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    • 2004
  • Amorphous silicon (a-Si) films are used in a broad range of solar cell, flat panel display, and sensor. Because of the greater ease of deposition and lower processing temperature, thin films are widely used for thin film transistors (TFTs). However, they have lower stability under the exposure of visible light and because of their low field effect mobility ($\mu$$_{FE}$ ) , less than 1 c $m^2$/Vs, they require a driving IC in the external circuits. On the other hand, polycrystalline silicon (poly-Si) thin films have superiority in $\mu$$_{FE}$ and optical stability in comparison to a-Si film. Many researches have been done to obtain high performance poly-Si because conventional methods such as excimer laser annealing, solid phase crystallization and metal induced crystallization have several difficulties to crystallize. In this paper, a new crystallization process using a molybdenum substrate has been proposed. As we use a flexible substrate, high temperature treatment and roll-to-roll process are possible. We have used a high temperature process above 75$0^{\circ}C$ to obtain poly-Si films on molybdenum substrates by a rapid thermal annealing (RTA) of the amorphous silicon (a-Si) layers. The properties of high temperature crystallized poly-Si studied, and poly-Si has been used for the fabrication of TFT. By this method, we are able to achieve high crystal volume fraction as well as high field effect mobility.

Formation of $PbTiO_3$ Thin Films by Thermal Diffusion from Multilayrs (다층 구조로부터 열 확산에 의한 $PbTiO_3$ 박막의 제조)

  • 서도원;최덕균
    • Journal of the Korean Ceramic Society
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    • v.30 no.6
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    • pp.510-516
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    • 1993
  • $PbTiO_3$ thin films have been formed by rapid thermal annealing(RTA) of $TiO_2$/Pb/$TiO_2$ multilayer films deposited on Si wafers by RF sputtering. Based on the optimal depositon conditions of TiO2 and Pb, $TiO_2$/Pb/$TiO_2$ three layers were deposited for 900$\AA$ each. These films were subjected to RTA process at the temperatures ranging from $400^{\circ}C$ to $900^{\circ}C$ for 30 seconds in air, and were analyzed by X-ray diffraction and transmission electron microscopy to investigate the phases and the microstructures. As a result, perovskite $PbTiO_3$ phases was obtained above $500^{\circ}C$ with the trace of unreacted $TiO_2$. RBS analysis revealed the anisotropic behavior of diffusion that the diffusivity of Pb to the bottom $TiO_2$ layer was faster than that of Pb to the top $TiO_2$ layer. The amorphous Pb-silicate was formed between film and Si substrate due to the diffusion of Pb, but Pb-silicate existed locally at the interface and the amount of that phase was very small. Therefore the effect of bottom $TiO_2$ layer as a diffusion barrier was confirmed. $PbTiO_3$ films formed by current technique showed a relative dielectric constant of 60, and the maximum breakdown field reached 170kV/cm.

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Thermal Treated Al-doped Zinc Oxide (AZO) Film-embedding UV Sensors

  • Kim, Jun-Dong;Yun, Ju-Hyeong;Ji, Sang-Won;Park, Yun-Chang;Anderson, Wayne A.;Han, Seok-Gyu;Kim, Yeong-Guk;Kim, Jae-Hyeon;Anderson, Wayne A.;Lee, Jeong-Ho;Lee, Jun-Sin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.90-90
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    • 2011
  • Transparent conducting oxide (TCO) films have been intensively utilized in the electric applications, such as, displays, lightings and solar cells due to the good electric conductivity with an excellent transmittance of the visible light. We, herein present an excellent Al-doped ZnO film (AZO), which has been fabricated by co-sputtering method. An as-deposited AZO film had an optical transmittance of 84.78% at 550 nm and a resistivity of $7.8{\times}10^{-3}{\Omega}cm$. A rapid annealing process significantly improved the optical transmittance and electrical resistivity of the AZO film to 99.67% and $1{\times}10^{-3}{\Omega}cm$, respectively. The fabricated AZO film was fabricated for a metal-semiconductor-metal (MSM) structure. The AZO film-embedding MSM device was highly responsive to a UV light.

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Influence of RTA treatments on optical properties of ZnO nanorods synthesized by wet chemical method

  • Shan, Qi;Ko, Y.H.;Lee, H.K.;Yu, J.S.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.190-190
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    • 2010
  • Zinc oxide is the most attractive material due to the large direct band gap (3.37 eV), excellent chemical and thermal stability, and large exciton binding energy (60 meV). Recently, ZnO nanorods were used as the high efficient antireflection coating layer of solar cells based on silicon (Si). In this reports, we studied the effects of rapid thermal annealing (RTA) treatment on optical properties of ZnO nanorods. For fabrication of ZnO nanorods, there are many methods such as hydrothermal method, sol-gel method, and metal organic chemical vapor deposition method. Among of them, we used the conventional wet chemical method which is simple and low temperature growth. In order to synthesize the ZnO nanorods, the ZnO films were deposited on Si substrate by RF magnetron sputtering at room temperature and the samples were dipped to aqua solution containing the zinc nitrate and hexamethylentetramines (HMT). The synthesis process was achieved in keeping with temperature of $90-95^{\circ}C$ and under constant stirring. The morphology of ZnO nanorods on glass and Si was characterized by scanning electron microscopy. For the analysis of antireflection performance, the reflectance and transmittance were measured by spectrophotometer. And for analyzing the effects of RTA treatment on ZnO nanorods, crystalline properties were investigated by X-ray diffraction measurements and optical properties was estimated by photoluminescence spectra.

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A Study on the Structure Fabrication of LDD-nMOSFET using Rapid Thermal Annealing Method of PSG Film (PSG막의 급속열처리 방법을 이용한 LDD-nMOSFET의 구조 제작에 관한 연구)

  • 류장렬;홍봉식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.12
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    • pp.80-90
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    • 1994
  • To develop VLSI of higher packing density with 0.5.mu.m gate length of less, semiconductor devices require shallow junction with higher doping concentration. the most common method to form the shallow junction is ion implantation, but in order to remove the implantation induced defect and activate the implanted impurities electrically, ion-implanted Si should be annealed at high temperature. In this annealing, impurities are diffused out and redistributed, creating deep PN junction. These make it more difficult to form the shallow junction. Accordingly, to miimize impurity redistribution, the thermal-budget should be kept minimum, that is. RTA needs to be used. This paper reports results of the diffusion characteristics of PSG film by varying Phosphorus weitht %/ Times and temperatures of RTA. From the SIMS.ASR.4-point probe analysis, it was found that low sheet resistance below 100 .OMEGA./ㅁand shallow junction depths below 0.2.mu.m can be obtained and the surface concentrations are measured by SIMS analysis was shown to range from 2.5*10$^{17}$ aroms/cm$^{3}$~3*10$^{20}$ aroms/cm$^{3}$. By depending on the RTA process of PSG film on Si, LDD-structured nMOSFET was fabricated. The junction depths andthe concentration of n-region were about 0.06.mu.m. 2.5*10$^{17}$ atom/cm$^{-3}$ , 4*10$^{17}$ atoms/cm$^{-3}$ and 8*10$^{17}$ atoms/cm$^{3}$, respectively. As for the electrical characteristics of nMOS with phosphorus junction for n- region formed by RTA, it was found that the characteristics of device were improved. It was shown that the results were mainly due to the reduction of electric field which decreases hot carriers.

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The Enhancement of Thermal Stability of Nickel Monosilicide by Ir and Co Insertion (Ir과 Co를 첨가한 니켈모노실리사이드의 고온 안정화 연구)

  • Yoon, Ki-Jeong;Song, Oh-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.6
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    • pp.1056-1063
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    • 2006
  • Thermal evaporated 10 nm-Ni/l nm-Ir/(or polycrystalline)p-Si(100) and 10 nm-$Ni_{50}Co_{50}$/(or polycrystalline)p-Si(100) films were thermally annealed using rapid thermal annealing fur 40 sec at $300{\sim}1200^{\circ}C$. The annealed bilayer structure developed into Ni(Ir or Co)Si and resulting changes in sheet resistance, microstructure, phase and composition were investigated using a four-point probe, a scanning electron microscopy, a field ion beam, an X-ray diffractometer and an Auger electron spectroscope. The final thickness of Ir- and Co-inserted nickel silicides on single crystal silicon was approximately 20$\sim$40 nm and maintained its sheet resistance below 20 $\Omega$/sq. after the silicidation annealing at $1000^{\circ}C$. The ones on polysilicon had thickness of 20$\sim$55 nm and remained low resistance up to $850^{\circ}C$. A possible reason fur the improved thermal stability of the silicides formed on single crystal silicon substrate is the role of Ir and Co in preventing $NiSi_2$ transformation. Ir and Co also improved thermal stability of silicides formed on polysilicon substrate, but this enhancement was lessened due to the formation of high resistant phases and also a result of silicon mixing during high temperature diffusion. Ir-inserted nickel silicides showed surface roughness below 3 nm, which is appropriate for nano process. In conclusion, the proposed Ir- and Co- inserted nickel silicides may be superior over the conventional nickel monosilicides due to improved thermal stability.

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70nm NMOSFET Fabrication with Ultra-shallow $n^{+}-{p}$ Junctions Using Low Energy $As_{2}^{+}$ Implantations (낮은 에너지의 $As_{2}^{+}$ 이온 주입을 이용한 얕은 $n^{+}-{p}$ 접합을 가진 70nm NMOSFET의 제작)

  • Choe, Byeong-Yong;Seong, Seok-Gang;Lee, Jong-Deok;Park, Byeong-Guk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.95-102
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    • 2001
  • Nano-scale gate length MOSFET devices require extremely shallow source/drain eftension region with junction depth of 20∼30nm. In this work, 20nm $n^{+}$-p junctions that are realized by using this $As_{2}^{+}$ low energy ($\leq$10keV) implantation show the lower sheet resistance of the $1.0k\Omega$/$\square$ after rapid thermal annealing process. The $As_{2}^{+}$ implantation and RTA process make it possible to fabricate the nano-scale NMOSFET of gate length of 70nm. $As_{2}^{+}$ 5 keV NMOSFET shows a small threshold voltage roll-off of 60mV and a DIBL effect of 87.2mV at 100nm gate length devices. The electrical characteristics of the fabricated devices with the heavily doped and abrupt $n^{+}$-p junctions ($N_{D}$$10^{20}$$cm^{-3}$, $X_{j}$$\leq$20nm) suggest the feasibility of the nano-scale NMOSFET device fabrication using the $As_{2}^{+}$ low energy ion implantation.

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Electrical Properties of $Bi_4Ti_3O_{12}$ Thin Films dependant on Oxygen Partial Pressure during Annealing (열처리 산소 분압에 따른 $Bi_4Ti_3O_{12}$ 박막의 전기적 특성 변화)

  • Cha, Yu-Jeong;Nahm, Sahn;Jeong, Young-Hun;Lee, Young-Jin;Paik, Jong-Hoo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.191-191
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    • 2009
  • $Bi_4Ti_3O_{12}$ (BiT) thin films were well developed on the Pt/Ti/$SiO_2/Si$ substrate by a metal organic decomposition (MOD) method. Oxygen was effective on the crystallization of the BiT thin films during a rapid thermal annealing process. The electrical properties of the BiT films dependant on the oxygen partial pressure were investigated. No crystalline phase was observed for the BiT film annealed at $700^{\circ}C$ under oxygen free atmosphere. However, its crystallinity was significantly evolutionned with increasing oxygen partial pressure. In addition, its dielectric and piezoelectric properties were enhanced with increasing oxygen partial pressure to 10 torr. Especially, the BiT film, annealed at $700^{\circ}C$ and 10 torr oxygen pressure, showed good dielectric properties: dielectric constant of 51 and dielectric loss of 0.2 % at 100 kHz. Its leakage current and piezoelectric constant ($d_{33}$) was also considerably improved, being as 0.62 nA/$cm^2$ at 1 V and approximately 51 pm/V, respectively.

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