• Journal of the Institute of Electronics Engineers of Korea CI
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• v.39 no.3
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• pp.1-17
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• 2002

In this paper, we present our experiences in using symbolic model checker(SMV) to analyze a number of properties of RACE cache coherence protocol designed by ETRI(Electronics and Communications Research Institute) and to verify that RACE protocol satisfies important requirements. To investigate this, we specified the model of the RACE protocol as the input language of SMV and specified properties as a formula in temporal logic CTL. We successfully used the symbolic model checker to analyze a number of properties of RACE protocol. We verified that abnormal state/input combinations was not occurred and every possible request of processors was executed correctly We verified that RACE protocol satisfies liveness, safety and the property that any abnormal state/input combination was never occurred. Besides, We found some ambiguities of the specification and a case of starvation that the protocol designers could not expect before. By this verification experience, we show advantages of model checking method. And, we propose a new method to generate automatically test cases which are used in simulation and testing.

• The Transactions of the Korea Information Processing Society
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• v.7 no.7
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• pp.2219-2228
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• 2000

Caches in a multiprocessing environment introduce the cache coherence problem. When multiple processors maintain locally cached copies of a unique shared-memory location, any local modification of the location can result in a globally inconsistent view of memory. Cache coherence protocols are important to operate a shared-memory multiprocessor system with efficiency and correctness. Since random testing and simulations are not enough to validate correctness of protocols, it is necessary to develop efficient and reliable verification methods. In this appear we present our experience in using VIS (Verification Interacting with Synthesis), a tool of formal method, to analyze a number of property of a cache coherence protocol, RACE (Remote Access Cache coherent Enforcement).

• Transactions of Materials Processing
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• v.23 no.4
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• pp.221-230
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• 2014

This study deals with a series of experimental investigations on multi-stage cold forging of an outer race used for a constant velocity (CV) joint with six inner ball grooves. The multi-stage cold forging, which consists of forward extrusion, upsetting, backward extrusion, and combined sizing-necking including ironing, was used to produce a prototype of the outer race. The cold forging tools such as forging punches and dies required in this multi-stage cold forging were also designed and fabricated. For the combined sizing-necking, especially, the longitudinally six-segmentallized punches were developed to easily eject from the necked inner groove of the outer race with consideration of the operating mechanism. Spheroidized SCr420H billet was used in the experimental study. To verify the suitability of the proposed process, the obtained parts were obtained from each forging operation, and the geometries were compared with the target dimensions. It was confirmed that the outer race with six inner ball grooves was well forged by adopting the proposed multi-stage cold forging, and the dimensional accuracy of the forged outer race matched well with the requirements.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.9
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• pp.395-406
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• 2007

Races in programs with OpenMP directives must be detected for debugging, because they may cause unexpected result by non-deterministic executions. But, Thread Checker of Intel corporation, a well-known existing tool for detecting the races, is not practical because this tool does not verify the existence of races and is known that the cost for race detection is too big. This paper presents a web-based tool which verify the existence of races with an optimal functionality and performance using the results from the property analysis of OpenMP program as well as the user requirements. Our tool is proved to be practical in the aspect of functionality and performance by experiments using synthetic programs, because the suggested tool can verify the existence of race and shows O(n) as the ratio of time consumption while Thread Checker can not verify the existence of race and shows $O(n^2)$ as the ratio, where n is the number of total accesses.

• Proceedings of the Korean Information Science Society Conference
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• 2002.04a
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• pp.40-42
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• 2002

캐쉬 일관성 유지 프로토콜은 공유 메모리 다중 프로세서 시스템의 정확하고 효율적인 작동에 중요하다. 시스템이 점점 복잡해짐에 따라 시뮬레이션 방법만으로는 프로토콜의 정확성을 확인하기는 어렵다. 본 논문에서는 CC-NUMA용 디렉토리 기반 캐쉬 일관성 프로토콜인 RACE 프로토콜을 정형기법 도구인 ESTEREL을 이용하여 프로토콜이 안정적으로 동작함을 검증하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.5
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• pp.311-321
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• 2019

This study was conducted to investigate the relationship between motivation, stress and flow in bicycle race gambling. To accomplish this, data were collected from gambling users of a bicycle velodrome. A total of 347 samples were employed for analysis. The collected data were analyzed through multiple regression analysis. The results of the analysis were as follows. First, the level of flow increased as the motivation for participating in the contest increased. Second, the influence of the motivation to participate in the race on immersion showed that a higher motivation to participate in the race was associated with a higher level of stress. Third, verification of the motive for participating in the race and the mediated effect of immersion between stress revealed that immersion had a mediated effect on stress. Based on the results of these analyses, practical and policy implications were suggested. Accordingly, there is a need to identify the motivation for career participation in counseling of experienced gamblers. Moreover, it is important to establish a system to prevent excessive gambling flow.

• The KIPS Transactions:PartA
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• v.12A no.7 s.97
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• pp.563-570
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• 2005

Hardware and software codesign framework called PeaCE(Ptolemy extension as a Cod sign Environment) allows to express both data flow and control flow. To formally verify an fFSM specification which expresses control flow in PeaCE, the step semantics of the model was defined. In this paper, we introduce the automatic verification tool developed by formal semantics of previous work. This tool uses the SMV as inner model checker md, through our tool, users can formally verify some important bugs such as race condition, ambiguous transition, and circulartransition without directly writing logical formulae.

• Journal of the korean Society of Automotive Engineers
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• v.6 no.1
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• pp.56-62
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• 1984

Various automotive and machine parts are having the shape of circular ring and the study and the verification of its dynamic characteristics can be the important basis of quality control and improvement of performance of inner and outer race of ball and roller radial bearing, ring gear, seal, etc. In this study, three separate sets of governing equations on the flexural vibration of circular ring were formulated each considering the effects of viscous damping, rotatory inertia and shear deformation, and three frequency formulas were derived. Numerical values of frequencies of circular and rectangular cross section ring were tabulated and compared with experimental value. Some important parameters were found in the ring vibration characteristics.

• Proceedings of the Korean Information Science Society Conference
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• 2005.11b
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• pp.310-312
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• 2005

유한상태 기계는 신뢰성이 요구되는 내장형 시스템의 제어흐름을 표현하고 검증하는데 많이 사용되는 모델이다. 하지만 자체가 가지고 있는 단순함으로 인해 복잡한 시스템을 명세하기에는 부족하다. 이러한 유한상태 기계의 단점을 극복하기 위해 다양하게 확장시킨 유한상태 기계들이 나왔지만 이렇게 확장된 유한상태 기계들에 대한 정형 의미의 부재로 인해서 요구사항중 하나인 명세를 검증하는데 어려움이 따른다. 이에 우리는 확장된 유한상태 기계의 정형 단계 의미를 정의하고, 이를 사용하여 모델에 대한 정형검증을 수행하였다. 그 결과 레이스 조건(race condition)과 애매한 전이, 순환하는 전이 등의 버그들을 모델에서 정형적으로 검출 할 수 있었다.

• The KIPS Transactions:PartD
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• v.12D no.6 s.102
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• pp.863-868
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• 2005

Hardware and software codesign framework called PeaCE(Ptolemy extension as a Codesign Environment) was developed. It allows to express both data flow and control flow which is described as fFSM which extends traditional finite state machine. While the fFSM model provides lots of syntactic constructs for describing control flow, it has a lack of their formality and then difficulties in verifying the specification. In order to define the formal semantics of the fFSM, in this paper, firstly the hierarchical structure in the model is flattened and then the step semantics is defined. As a result, some important bugs such as race condition, ambiguous transition, and circulartransition can be formally detected in the model.