• Title/Summary/Keyword: RSPC

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Error Control Scheme for High-Speed DVD Systems

  • Lee, Joon-Yun;Lee, Jae-Jin;Park, Tae-Geun
    • 정보저장시스템학회:학술대회논문집
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    • 2005.10a
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    • pp.103-110
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    • 2005
  • We present a powerful error control decoder which can be used in all of the commercial DVD systems. The decoder exploits the error information from the modulation decoder in order to increase the error correcting capability. We can identify that the modulation decoder in DVD system can detect errors more than $60\%$ of total errors when burst errors are occurred. In results, fur a decoded block, error correcting capability of the proposed scheme is improved up to $25\%$ more than that of the original error control decoder. In addition, the more the burst error length is increased, the better the decoder performance. Also, a pipeline-balanced RSPC decoder with a low hardware complexity is designed to maximize the throughput. The maximum throughput of the RSPC decoder is 740Mbps@100MHz and the number of gate counts is 20.3K for RS (182, 172, 11) decoder and 30.7K for RS (208, 192, 17) decoder, respectively

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The Performance evaluation of the Reed-Solomon Product Codes in Burst Error (Burst Error Channel에서 Reed-Solomon Product 코드의 에러 정정 평가 방법)

  • Han, Sung-Hyu;Lee, Yoon-Woo;Hwang, Sung-Hee;Ryu, Sang-Hyun;Shin, Dong-Ho;Joong-Eor, Joong-Eor
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.2493-2495
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    • 2001
  • Burst Error Channel의 에러 정정 기술로써 Reed-Solomon Product Code(RSPC)가 광범위하게 사용되고 있다. 그러나 Random Error Channel과는 달리 Burst Error Channel 상에서 RSPC의 에러 정정 평가 방법에는 많은 어려움이 있다. 우리는 이번 논문에서 Burst Error Channel 상에서 RSPC의 Error Correction Capability의 확률적인 계산 방법을 기술하려 한다.

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A Study on the Modeling and Simulation Analysis of Rermote Solid State Power Controller (원격전력제어 장치의 모델링 및 시뮬레이션 분석에 대한 연구)

  • Jeon, Yeong Cheol;Lee, Hyuek Jae;Chong, Won Yong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.461-464
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    • 2009
  • The conventional electro-mechanical circuit break and relay are widely used in large-sized DC power system. However, recently due to high reliability, remote controllability and small power dissipation of a RSPC (Remote Solid State Power Controller), high-friendly DC power systems have increasingly adopted the RSPC as an essential element. In this paper, we have conducted the modeling of a RSPC circuit and the simulation analysis for $I^2t$ curve, respectively.

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The Performance evaluation of the Reed-Solomon Product Code(RSPC) (Reed-Solomon Product Code의 에러 정정 능력 평가 방법)

  • Hwang, Sung-Hee;Lee, Yoon-Woo;Han, Sung-Hyu;Ryu, Sang-Hyun;Shin, Dong-Ho;Park, In-Sik
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.2496-2498
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    • 2001
  • 광 디스크 channel상에서 RSPC의 error correction capability를 확률적인 계산 방법으로 계산하는 데는 많은 어려움이 있다. 그 이유는 바로 광 디스크 channel이 burst error channel이기 때문인데, 이 burst error를 어떻게 다루는 가에 따라 그 error correction capability는 사뭇 달라진다. 이 논문에서는 Sony의 dust error distribution[1] 아래에서 4-state Morkov Chain[2]로 modeling하고 그 결과를 가지고 burst error를 channel의 특성과 ECC format의 특성에 맞게 제어할 수 있는 확률적인 계산방법을 소개하고 그것을 simulation하고자 한다.

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Transceiver Design Using Local Channel State Information at Relays for A Multi-Relay Multi-User MIMO Network

  • Cho, Young-Min;Yang, Janghoon;Kim, Dong Ku
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.7 no.11
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    • pp.2616-2635
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    • 2013
  • In this paper, we propose an iterative transceiver design in a multi-relay multi-user multiple-input multiple-output (MIMO) system. The design criterion is to minimize sum mean squared error (SMSE) under relay sum power constraint (RSPC) where only local channel state information (CSI)s are available at relays. Local CSI at a relay is defined as the CSI of the channel between BS and the relay in the $1^{st}$ hop link, and the CSI of the channel between the relay and all users in the $2^{nd}$ hop link. Exploiting BS transmitter structure which is concatenated with block diagonalization (BD) precoder, each relay's precoder can be determined using local CSI at the relay. The proposed scheme is based on sequential iteration of two stages; stage 1 determines BS transmitter and relay precoders jointly with SMSE duality, and stage 2 determines user receivers. We verify that the proposed scheme outperforms simple amplify-and-forward (SAF), minimum mean squared error (MMSE) relay, and an existing good scheme of [13] in terms of both SMSE and sum-rate performances.

Joint Base Station and Relay Precoder Design with Relay Local Channel State Information for Multi-relay Aided Multi-user All-MIMO System (다중 릴레이, 다중 사용자 All-MIMO 시스템에서 릴레이 지역 채널 정보를 사용한 기지국 및 릴레이 전처리기 공동 설계 기법)

  • Cho, Young-Min;Jang, Seung-Jun;Kim, Dong-Ku
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.6A
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    • pp.405-419
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    • 2012
  • In this paper, we propose a joint base station(BS) and relay precoders design in multi-relay aided multi-user all-multiple-input multiple-output(MIMO) system. The design criterion is to minimize user sum mean square error(SMSE) with relay sum power constraint(RSPC) where only local channel state information(CSI)s are available at relays. Local CSI at a relay is defined as the CSI of the channel which the relay itself accesses, out of among all the 1st hop and the 2nd hop channel in the system. With BS precoder structure which is concatenated with block diagonalization(BD) precoder, each relay can determine its own precoder using only local CSI. Proposed scheme is based on sequential iteration of two stages; stage 1 determines BS precoder and relay precoders jointly with SMSE duality, and stage 2 determines user receivers. Proposed scheme can be demonstrated theoretically to be always converge. We verify that proposed scheme outperforms simple amplify-and-forward(SAF), MMSE relay, and proposed schemes in [1] in terms of both SMSE and sum-rate performances.