• Title/Summary/Keyword: RMS surface roughness

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Fabrication of cube textured Au/Ni template using electoless-plating (무전해 도금법을 이용한 cube 집합조직을 가지는 Au/Ni template 제조)

  • Lim Jun Hyung;Kim Jung Ho;Jang Seok Hem;Kim Kyu Tae;Lee Jin Sung;Yoon Kyung Min;Joo Jinho;Kim Chan-Joong;Ha Hong-Soo;Park Chan
    • Progress in Superconductivity
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    • v.6 no.2
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    • pp.133-137
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    • 2005
  • We fabricated the Au/Ni template for YBCO coated conductors and evaluated texture formation and the microstructural evolution. The cube textured Ni substrate was fabricated by rolling and recrystallization annealing, and subsequently Au layer formed on the substrate by electroless-plating method. The texture was evaluated by pole-figure with x-ray goniometer with orientation distribution function (ODF) analysis. The surface roughness and grain boundary morphology of template were characterized by atomic force microscopy (AFM) We observed that Au layer deposited epitaxially on Ni substrate and formed a strong cube texture when plating time was optimized. The full-width at half-maximum (FWHM) was $8.4^{\circ}$ for out-of-plane and $9.98^{\circ}$ for in-plane texture for plating time of 30 min. Microstructural observation showed that the Au layer was homogeneous and dense without formation of crack/microcrack. In addition, we observed that root-mean-square (RMS) and depth of grain boundary were 14.6 nm and 160 $\AA$ for the Au layer, respectively, while those were 27.0 nm and 800 $\AA$ for the Ni substrate, indicating that the electoless-plated Au layer had relatively smooth surface and effectively mollified grain groove.

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Evaluation of Flexible Complementary Inverters Based on Pentacene and IGZO Thin Film Transistors

  • Kim, D.I.;Hwang, B.U.;Jeon, H.S.;Bae, B.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.154-154
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    • 2012
  • Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

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Hybrid complementary circuits based on organic/inorganic flexible thin film transistors with PVP/Al2O3 gate dielectrics

  • Kim, D.I.;Seol, Y.G.;Lee, N.E.;Woo, C.H.;Ahn, C.H.;Ch, H.K.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.479-479
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    • 2011
  • Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

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Piezo-electrically Actuated Micro Corner Cube Retroreflector (CCR) for Free-space Optical Communication Applications

  • Lee, Duk-Hyun;Park, Jae-Y.
    • Journal of Electrical Engineering and Technology
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    • v.5 no.2
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    • pp.337-341
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    • 2010
  • In this paper, an extremely low voltage operated micro corner cube retroreflector (CCR) was fabricated for free-space optical communication applications by using bulk silicon micromachining technologies. The CCR was comprised of an orthogonal vertical mirror and a horizontal actuated mirror. For low voltage operation, the horizontal actuated mirror was designed with two PZT cantilever actuators, torsional bars, hinges, and a mirror plate with a size of $400{\mu}m{\times}400{\mu}m$. In particular, the torsional bars and hinges were carefully simulated and designed to secure the flatness of the mirror plate by using a finite element method (FEM) simulator. The measured tilting angle was approximately $2^{\circ}$ at the applied voltage of 5 V. An orthogonal vertical mirror with an extremely smooth surface texture was fabricated using KOH wet etching and a double-SOI (silicon-on-insulator) wafer with a (110) silicon wafer. The fabricated orthogonal vertical mirror was comprised of four pairs of two mutually orthogonal flat mirrors with $400{\mu}m4 (length) $\times400{\mu}m$ (height) $\times30{\mu}m$ (thickness). The cross angles and surface roughness of the orthogonal vertical mirror were orthogonal, almost $90^{\circ}$ and 3.523 nm rms, respectively. The proposed CCR was completed by combining the orthogonal vertical and horizontal actuated mirrors. Data transmission and modulation at a frequency of 10 Hz was successfully demonstrated using the fabricated CCR at a distance of approximately 50 cm.

Effect of Thin-Film Thickness on Electrical Performance of Indium-Zinc-Oxide Transistors Fabricated by Solution Process (용액 공정을 이용한 IZO 트랜지스터의 전기적 성능에 대한 박막 두께의 영향)

  • Kim, Han-Sang;Kyung, Dong-Gu;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.8
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    • pp.469-473
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    • 2017
  • We investigated the effect of different thin-film thicknesses (25, 30, and 40 nm) on the electrical performance of solution-processed indium-zinc-oxide (IZO) thin-film transistors (TFTs). The structural properties of the IZO thin films were investigated by atomic force microscopy (AFM). AFM images revealed that the IZO thin films with thicknesses of 25 and 40 nm exhibit an uneven distribution of grains, which deforms the thin film and degrades the performance of the IZO TFT. Further, the IZO thin film with a thickness of 30 nm exhibits a homogeneous and smooth surface with a low RMS roughness of 1.88 nm. The IZO TFTs with the 30-nm-thick IZO film exhibit excellent results, with a field-effect mobility of $3.0({\pm}0.2)cm^2/Vs$, high Ion/Ioff ratio of $1.1{\times}10^7$, threshold voltage of $0.4({\pm}0.1)V$, and subthreshold swing of $0.7({\pm}0.01)V/dec$. The optimization of oxide semiconductor thickness through analysis of the surface morphologies can thus contribute to the development of oxide TFT manufacturing technology.

Deposition of IBAD-MgO for superconducting coated conductor (초전도 박막선재용 IBAD-MgO 박막 증착)

  • Ha, Hong-Soo;Kim, Hyo-Kyum;Yang, Ju-Saeng;Ko, Rock-Kil;Kim, Ho-Sup;Oh, Sang-Soo;Song, Kyu-Jeong;Park, Chan;Yoo, Sang-Im;Joo, Jin-Ho;Moon, Seong-Hyun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.282-283
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    • 2005
  • Ion beam assisted deposition(IBAD) technique was used to produce biaxially textured polycrystalline MgO thin films for high critical current YBCO coated conductor. Hastelloy tapes were continuous electropolished with very smooth surface for IBAD-MgO deposition, RMS roughness of Hastelloy tape values below 2 nm and local slope of less than $1^{\circ}$. After the polishing of the tape an amorphous $Y_2O_3$ and $Al_2O_3$ are deposited Biaxially textured MgO was deposited on amorphous layer bye-beam evaporation with a simultaneous bombardment of high energy ions. We had developed the RHEED to measure in-situ biaxial texture of film surface as thin as tens angstrom. And also ex-situ characterization of buffer layers was studied using XRD and SEM. The full-width at half maximum(FWHM) out of plane texture of IBAD-MgO template is $4^{\circ}$.

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Study of relationship between diameter of carbon nanotubes and surface morphology of $Al_2O_3$ supporting layer

  • Kim, Su-Yeon;Song, U-Seok;Choe, Won-Cheol;Jeong, U-Seong;Jeon, Cheol-Ho;Park, Jong-Yun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.72-72
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    • 2010
  • 탄소나노튜브(carbon nanotubes : CNTs)는 뛰어난 전기적, 물리적인 특성을 가지고 있기 때문에 다양한 분야에서 이를 활용하려는 노력들이 활발히 이루어지고 있다. CNTs의 전기적인 특성은 직경에 의해 결정되므로, 직경을 균일하게 제어하는 일이 CNTs를 기반으로 한 전자소자 응용에 가장 중요한 사항이라 할 수 있다. 일반적으로 화학기상증착법(chemical vapor deposition, CVD)으로 합성된 CNTs의 직경은 촉매의 크기에 의존하기 때문에, 촉매의 크기를 제어하기 위한 다양한 연구들이 활발히 진행되고 있다[1-3]. 하지만 CNTs의 성장온도 근처에서 촉매 입자는 표면 확산(surface diffusion)에 의해 응집(agglomeration)되기 때문에 작고 균일한 크기의 촉매를 얻기 어렵다. 본 연구에서는 Si(001) 기판 위에 지지층(supporting layer)인 Al의 두께를 변화시켜 증착하고, 열적산화과정을 통해 $Al_2O_3$ 층을 형성한 후 Fe을 증착하여 CNTs를 합성하였다. $Al_2O_3$ 지지층과 Fe 촉매입자의 구조와 화학적 상태를 원자힘현미경 (atomic force microscopy, AFM), 주사전자현미경 (scanning electron microscopy, SEM), 투과전자현미경 (transmission electron microscopy, TEM), X-선 광전자 분광기(X-ray photoelectron spectroscopy)를 통해 분석하였고, 성장된 CNTs는 SEM, TEM, 라만 분광법 (Raman spectroscopy)을 통해 분석하였다. 그 결과, $Al_2O_3$ 층은 두께에 따라 각기 다른 표면 거칠기(RMS roughness)와 결정립(grain)의 크기를 갖게 되며, 이러한 표면구조가 Fe 촉매입자의 표면확산에 의한 응집에 관여하여 CNTs의 직경에 영향을 미치는 것을 확인하였다. 또한 $Al_2O_3$ 지지층의 두께가 15 nm인 경우, Fe의 응집현상이 억제되어 좁은 직경분포를 지닌 고순도 단일벽 탄소나노튜브(Single-walled CNTs)가 성장되는 것을 확인하였다.

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Dry Etching of AlGaAs and InGaP in a Planar Inductively Coupled B$Cl_3$ Plasma (평판형 고밀도 유도결합 B$Cl_3$ 플라즈마를 이용한 AlGaAs와 InGaP의 건식식각)

  • ;;;;;;;S. J. Pearton
    • Journal of the Korean institute of surface engineering
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    • v.36 no.4
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    • pp.334-338
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    • 2003
  • $BCl_3$고밀도 평판형 유도결합 플라즈마(High Density Planar Inductively Coupled Plasma)를 이용하여 AlGaAs와 InGaP의 건식식각에 대하여 연구하였다. 본 실험에서는 ICP 소스파워(0∼500 W), RIE 척 파워(0-150 W), 공정압력(5∼15 mTorr)의 변화에 따른 AlGaAs와 InGaP의 식각률, 식각단면 그리고 표면 거칠기 등을 분석 하였다. 또, 공정 중 OES(Optical Emission Spectroscopy)를 이용하여 in-situ로 플라즈마를 관찰하였다. $BCl_3$ 유도결합 플라즈마를 이용한 AlGaAs의 식각결과는 우수한 수직측벽도와(>87$^{\circ}$) 깨끗하고 평탄한 표면(RMS roughness = 0.57 nm)을 얻을 수 있었다. 반면, InGaP의 경우에는 식각 후 표면이 다소 거칠어진 것을 확인할 수 있었다. 모든 공정조건에서 AlGaAs의 식각률이 InGaP보다 더 높았다. 이는 $BCl_3$ 유도결합 플라즈마를 이용하여 InGaP을 식각하는 동안 $InCl_{x}$ 라는 휘발성이 낮은 식각부산물이 형성되어 나타난 결과이다. ICP 소스파워와 RIE 척파워가 증가하면 AlGaAs와 InGaP모두 식각률이 증가하였지만, 공정압력의 증가는 식각률의 감소를 가져왔다. 그리고 OES peak세기는 공정압력과 ICP 소스파워의 변화에 따라서는 크게 변화하였지만 RIE 척파워에 따라서는 거의 영향을 받지 않았다.

Characteristic Analysis of ITO by Variation of Plasma Condition to Fabricate OLED of High Efficiency (고효율 OLED 제작을 위한 플라즈마 조건 변화에 따른 ITO 특성 분석)

  • Kim, Jung-Yeoun;Kang, Myung-Koo
    • 전자공학회논문지 IE
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    • v.44 no.2
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    • pp.8-13
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    • 2007
  • This paper aims to analyze the characteristics of ITO which are caused by variation of plasma condition to fabricate the OLED of high efficiency. We treated $N_2$ gas and $O_2$ gas plasma on the surface of the ITO by changing their RF plasma power into 100 W, 200 W, 400 W and by changing their 9as pressure into 12 mTorr, 120 mTorr. The work function of ITO that plasma treatment was done by using $N_2$ gas had value of $4.88{\sim}5.07\;eV$, and that by using $O_2$ gas, $4.85{\sim}4.97 eV$. The characteristics of the ITO were most efficient in the $N_2$ gas plasma with the RF power of 200W and gas pressure of 120 mTorr. The rms roughness of ITO surface is the value from AFM image. In this case, ITO obtained $25.2\;{\AA}$ and $30.5\;{\AA}$ in the $N_2$ and $O_2$ gas plasma respectively when it had the RF power of 200 W. But ITO that didn't have plasma treatment was $44.5{\AA}$. The variation of ITO transmittance was almost not discovered by the change of $N_2$ gas and $O_2$ gas pressure.

Effects of High-temperature Annealing of CeO$_2$ Buffer Layers on the Surface Morphology of YBa$_2Cu_3O_{7-{\delta}}$ Films on CeO$_2$-buffered R-cut Sapphire Substrates (CeO$_2$ 완충층에 대한 고온 열처리가 CeO$_2$ 완충층을 지닌 R-cut 사파이어 기판 우에 성장된 YBa$_2Cu_3O_{7-{\delta}}$ 박막의 표면상태에 미치는 영향)

  • Lee, Jae-Hun;Yang, Woo-Il;Jang, Jeong-Mun;Ryu, Jae-Su;Komashko, V.A.;Lee, Sang-Yeong
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.152-159
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    • 1999
  • YBa$_2Cu_3O_{7-{\delta}}$ (YBCO) films grown on CeO$_2$-buffered r-cut sapphire substrates (CbS's) were prepared and their structural and electrical properties were measured. Post-annealed CeO$_2$ films were used as buffer layers for the experiments. It turned out that the YBCO films grown on post-annealed CbS's had the rms roughness of less than 20 ${\AA}$ and peak-to-peak roughness of about 30 ${\AA}$ when the YBCO film thickness was 3000 ${\AA}$. Meanwhile, YBCO films on in-situ grown CeO$_2$ buffer layers on r-cut sapphire substrates appeared to have the peak-to-peak roughness of more than 450 ${\AA}$. X-ray diffraction data revealed that the YBCO flms were epitaxially grown along the c-axis with the typical FWHM of(005) ${\theta}$ -2 ${\theta}$ peak about 0. 16 $^{\circ}$ and ${\Delta}$ ${\omega}$ of the (005) peak about 0.5 $^{\circ}$. T$_c$ > 87 K, ${\Delta}$T < 1 K and R(look)/R(100K) ${\ge}$3 were observed from the YBCO films. Applicability of the YBCO films for high-frequency applications was described.

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