• 제어로봇시스템학회:학술대회논문집
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• 1990.10a
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• pp.634-638
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• 1990

In this paper, the architecture of a dataflow logic solving processor for programmable logic controller is proposed. As the proposed DFLSP (dataflow logic solving processor) is designed based on the dataflow architecture, it has inherently concurrent processing and data synchronization capabilities. The proposed DFLSP is adequate for high speed programmable logic controllers and gets rid of data synchronization problem in hardware level. The performance of the proposed DFLSP is analyzed using computer simulations and prototype hardware. With single processing element, the logic solving time is 144 usec per 1K steps of logic program and with eight processing elements, the logic solving time is 23 usec per 1K steps of logic program with reasonable assumptions.

• Journal of the Institute of Convergence Signal Processing
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• v.20 no.3
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• pp.118-124
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• 2019

Recently, the industrial field has been changed to the smart factory system based on information and communication technology (ICT) in order to improve productivity, quality and customer satisfaction. The most important machine to realize the smart factory is the AGV(automatic guided vehicle) and the adoption of AGV is increasing. Generally, AGV is developed using general purpose PLC(Programmable Logic controller), but the price of AGV is expensive and its volume is large. On the other hand, the industrial field due to space constraints in the workplace is required the low cost AGV which can be minimization, expansion of function, and easily reconfiguration. Therefore, in order to solve these problems, this study is proposed a design method of AGV controller with built-in PLC, and evaluated its performance. In the results of the experimentation, it showed good performance (speed control error = 0.021[m/s], posture control error=2.1[mm]) for the speed and posture control. In this way, when applying the proposed AGV controller in this study to the industrial filed, it is possible to reduce the size and reconfigure at low cost.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.40 no.8
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• pp.836-844
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• 1991

PLC(programmable logic controller) system is widely used for the control of factory. PLC system receives ladder diagram which is drawn by the user to implement hardware logic, converts the ladder diagram into sequence program which is executable in the PLC system, and executes the sequence program indefinitely unless user breaks. The sequence program processes the data of on/off signal, and endures 1 scan delay and missing of pulse-type signal shorter than a scan time. So, data dependency doesn't exist. By applying theis characteristics to multiprocessor architecture, we design parellel PLC functionally and evaluate performance upgrade. Parallel PLC consists of central processing module, N general processing unit, and a shared memory by master-slave type. Each module executes allocated sequence program by the control of central processing module. We can expect performance upgrade by parallel processing, and reliability by relocation of sequence program when error occurs in processing module.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.735-738
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• 1998

To develop an effective virtual prototyping methodology for the PLC(Programmable Logic Controller) based real-time systems, a conversion algorithm from RLL(Relay Ladder Logic) to statechart is presented in this paper. The RLL is the main programming language to represent the operation of the PLC, and the statechart is the most widely used tool in the field of virtual prototyping in order to represent the behaviour of real-time systems. A virtual prototyping for an example case is implemened to evaluate the benefit of the proposed algorithm.

• Journal of Power System Engineering
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• v.8 no.1
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• pp.62-68
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• 2004

This paper describes a fault tolerant control in distributed PLC(Programmable Logic Controller) system to ensure reliability of controllers which have some faults simultaneously. First, the behavior of PLC is modeled as discrete expressions using Galois field. Then, we design the control laws for additional spare controllers to generate parity code with two dimensions. Finally, the algorithm for estimating normal output instead of abnormal output from the controllers with fault is suggested. Comparing to the traditional duplication method, the suggested method can reduce the number of spare controllers significantly to ensure control reliability. This method will be applied to an automatic system in order to increase reliability. Also, it can improve cost performance of the system.

• Proceedings of the Korean Society for Agricultural Machinery Conference
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• 1998.12a
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• pp.174-179
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• 1998

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.1386-1389
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• 1993

We are describing the architecture of a fuzzy logic controller using pulse-width-modulation (PDM) technique and a pipeline structure. Features of this controller are: A new architecture for the inference unit, reduced chip area and less I/O-pins. Additionally we present two different rule-bases: one hardwired with reduced chip-area and the other programmable for prototyping. Also an architecture of a parallel minimum-gate is shown.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.7
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• pp.741-749
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• 2014

This paper proposes a machine vision module for PLCs (Programmable Logic Controllers). PLC is the industrial controller most widely used in factory automation system. However most of the machine vision systems are based on PC (Personal Computer). The machine vision system embedded in PLC is required to reduce the cost and improve the convenience of implementation. In this paper, we newly propose a machine vision module based on PLC. The image processing libraries are implemented and integrated with the PLC programming tool. In order to interface the libraries with ladder programming, the ladder instruction set was also designed for each vision library. By use of the developed system, PLC users can implement vision systems easily by ladder programming. The developed system was applied to sample inspection system to verify the performance. The experimental results show that the proposed system can reduce the cost of installing as well as increase the ease-of-implementation.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1016-1021
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• 2003

The overall size of electronic product is becoming small according to development of technology. Accordingly it is difficult to inspect these small components by human eyes. So, an automation system for inspecting them has been used. The existing system put microprocessor or Programmable Logic Controller (PLC) use. The structure of microprocessor-based controller and PLC use basically composed of memory devices such as ROM, RAM and I/O ports. Accordingly, the system is not only becomes complicated and enlarged but also higher price. In this paper, we implement FPGA-based One-chip Programmable Timing Controller for Inspecting Small components to resolve above problems and design the high performance controller by using VHDL. With fast development, the FPGA of high capacity that can have memory and PLL have been introduced. By using the high-capacity FPGA, the peripherals of the existent controller, such as memory, I/O ports can be implemented in one FPGA. By doing this, because the complicated system can be simplified, the noise and power dissipation problems can be minimized and it can have the advantage in price. Since the proposed controller is organized to have internal register, counter, and software routines for generating timing signals, users do not have to problem the details about timing signals and need to only send some values about an inspection system through an RS232C port. By selecting theses values appropriate for a given inspection system, desired timing signals can be generated.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.279-283
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• 1987

In this paper an intelligent supervisory programmable controller for automatic assembly machine is developed. This is achieved by adding sequence control hardware with input-interrupts to supervisory real time language and also by incorporating an automatic planning method which uses a predicate logic model and an action model. The designed intelligent supervisory programmable controller is applied to Die Bonding Machine and is to found to work well.