• Molecules and Cells
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• v.46 no.8
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• pp.461-469
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• 2023

The tail of the striatum (TS) is located at the caudal end in the striatum. Recent studies have advanced our knowledge of the anatomy and function of the TS but also raised questions about the differences between rodent and primate TS. In this review, we compare the anatomy and function of the TS in rodent and primate brains. The primate TS is expanded more caudally during brain development in comparison with the rodent TS. Additionally, five sensory inputs from the cortex and thalamus converge in the rodent TS, but this convergence is not observed in the primate TS. The primate TS, including the caudate tail and putamen tail, primarily receives inputs from the visual areas, implying a specialized function in processing visual inputs for action generation. This anatomical difference leads to further discussion of cellular circuit models to comprehend how the primate brain processes a wider range of complex visual stimuli to produce habitual behavior as compared with the rodent brain. Examining these differences and considering possible neural models may provide better understanding of the anatomy and function of the primate TS.

• The Transactions of the Korea Information Processing Society
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• v.5 no.6
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• pp.1633-1638
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• 1998

In this paper we propose a generic BIST builder for the Embedded Multiple HAM modules in ASICs, The BlST circuitry is automatically generated according to the specification of the target RAM Modules and the applying test algorithms to them. The lJIST is designed using the TOP-DOWN technique and, thus, has the several advantages in the area of the selection of test algorithm, the development of the circuitry, and the reuse of the circuitry, In addition, we have modified the existing serial interiacing approach to obtain smaller additional BlST circuitry and higher fault coverage and better B1ST sharing of the target RAM Modules in ASICs.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.3
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• pp.224-229
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• 2008

In the paper, a new Constraint algorithm is proposed to solve the fan-in problem occurred in the encoding circuitry of an ADC. The Flash ADC architecture uses a Double-Base Number System(DBNS). The DBNS has been known to represent the Multidimensional Logarithmic Number System (MDLNS) used for implementing the multiplier accumulator architecture of FIR filter in Digital Signal Processing (DSP) applications. The authors use the DBNS with the base 2 and 3 in designing ADC encoder circuits, which is called as Double Base Integer Encoder(DBIE). A symmetric map is analyzed first, and then asymmetric map is followed to provide addition ready DBNS for DSP circuitry. The simulation results of the DBIE circuits in 6-bit and 8-bit ADC show the effectiveness of the Constraint algorithm with $0.18{\mu}m$ CMOS technology. The DBIE yields faster processing speed compared to the speed of Fat Tree Encoder (FAT) circuits by 17% at more power consumption by 39%.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.73-76
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• 2002

In this paper we present an integrated Hail sensor It for fan motors, fabricated in industrial bipolar process. As a discrete Hall sensor and signal processing circuitry In the fan motor system were Integrated into single chip a temperature dependence of Hall sensitivity and Hall offset voltage can be compensated and cancelled by on-chip circuitry. We Propose a novel temperature compensation of Hall sensitivity with negative temperature coefficient (TC) using the differential amplifier gain with Positive TC. After a package of the chip was sealed using a plastic Package 20 Pins, the thermal and magnetic characteristics were investigated. The obtained experimental results are in agreement with analytical predictions and have more excellent performance than\ulcorner conventional the fan motor system using discrete Hall sensor.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.188-198
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• 1994

The distributed arithmetic approach has been commonly recognized as an efficient method to implement the inner-product type of computation with fixed coefficients such as DCT/IDCT. This paper presents a novel architecture and the implementation of 2-D DCT/IDCT VLSI chip based on distributed arithmetic. The main feature of the proposed architecture is a fully 2-bit serial pipeline and parallel structure with memory-based signal processing circuitry, which is efficient to the implementation of the bit-serial operation of distributed arithmetic. All modules of the proposed architecture are designed with NP-dynamic circuitry to reduce the power consumption and to increase the performance. This chip is applicable in HDTV systems working at video sampling rate up to 75 MHz.

• Journal of Information Processing Systems
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• v.16 no.3
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• pp.677-687
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• 2020

This paper deals with the electrical shock that can occur in a car wireless charging system. The recently released the Wireless Power Consortium (WPC) standard specifies that the receiver must be protected from the radio power generated by the transmitter and presents two scenarios in which the receiver may be subjected to electrical shock due to the wireless power generated by the transmitter. The WPC also provides a hardware approach for blocking the wireless power generated by the transmitter to protect the receiver in each situation. In addition, it presents the hardware constraints that must be applied to the transmitter and the parameters that must be constrained by the software. In this paper, we analyze the results of the electric shock in the vehicle using the WPC certified transmitter and receiver in the scenarios presented by WPC. As a result, we found that all the scenarios had electrical shocks on the receiver, which could have a significant impact on the receiver circuitry. Therefore, we propose wireless power transfer limit (WPTL) algorithm to protect receiver circuitry in various vehicle charging environments.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1993.04a
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• pp.208-212
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• 1993

Third order correlation function is to be advantageous to detect unique features embedded in various random signals that are undtectable with second order correlation or power spectrum. In order paper, we will introduce a real time third order correlator which consists of a laser light source, an acousto-optical modulator with signal controlling circuitry, and a CCD camera connected to computer for image processing. With this correlator, the third order correlation pattern of a signal can be immediately obtained at the camera due to parallelnature of optical computing.

• Journal of Multimedia Information System
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• v.7 no.3
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• pp.231-238
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• 2020

This work presents a fully analog baseline wander tracking and removal circuitry using high-pass filter (HPF) based R-peak detection and quadratic interpolation that does not require digital post processing, thus suitable for compact and low power long-term ECG monitoring devices. The proposed method can effectively track and remove baseline wander in ECG waveforms corrupted by various motion artifacts, whereas minimizing the loss of essential features including the QRS-Complex. The key component for tracking the baseline wander is down sampling the moving average of the corrupted ECG waveform followed by quadratic interpolation, where the R-peak samples that distort the baseline tracking are excluded from the moving average by using a HPF based approach. The proposed circuit is designed using CMOS 0.18-㎛ technology (1.8V supply) with power consumption of 19.1 ㎼ and estimated area of 15.5 ㎟ using a 4^th order HPF and quadratic interpolation. Results show SNR improvement of 10 dB after removing the baseline wander from the corrupted ECG waveform.

• Progress in Medical Physics
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• v.6 no.1
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• pp.65-77
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• 1995

A new gamma camera using a-Si : H photodetectors has been designed for the imaging of heart and other small organs. In this new design the photomultiplier tubes and the position sensing circuitry are replaced by 2-D array of a-Si : H p-i-n pixel photode tectors and readout circuitry which are built on a substrate. Without the photomultiplier tubes this camera is light weight, hence can be made portable. To predict the characteristics and the performance of this new gamma camera we did Monte Carlo simulations. In the simulations 128${\times}$128 imaging array of various pixel sixes were used. $\^$99m/Tc(140keV)and $\^$201/Tl(70keV) were used as radiation sources. From the simulations we could obtain the resolution of the camera and ther overall system, and the blurring effects due to scattering in the phantom. Using the Wiener filter for image processing, restoration of the blurred image could be achieved. Simulation results of a-Si : H based gamma camera were compared with those of a conwentional gamma camera.

• Journal of the Korean Society for Precision Engineering
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• v.19 no.1
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• pp.212-218
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• 2002

This research is the development of a distributed tactile sensor using PVDF film far the detection of the contact state. The prototype of the tactile sensor with 8$\times$8 taxels was fabricated using PVDF film and flexible circuitry. In the fabrication procedure, the electrode and the common electrode patterns are attached to the both side of the 28${\mu}m$ thickness PVDF film. The sensor is covered with polyester film for insulation. The signals of a contact pressure to the tactile sensor are sensed and processed in the DSP system in which the signals are digitalized and filtered. And the signals are integrated for taking the force profile. The processed signals of the output of the sensor are visualized to take the shape and force distribution of the contact object in personal computer. The usefulness of the sensor system is verified through the sensing examples.