• Title/Summary/Keyword: Process and device simulation

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Subthreshold characteristics of buried-channel pMOSFET device (매몰채널 pMOSFET소자의 서브쓰레쉬홀드 특성 고찰)

  • 서용진;장의구
    • Electrical & Electronic Materials
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    • v.8 no.6
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    • pp.708-714
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    • 1995
  • We have discussed the buried-channel(BC) behavior through the subthreshold characteristics of submicron PMOSFET device fabricated with twin well CMOS process. In this paper, we have guessed the initial conditions of ion implantation using process simulation, obtained the subthreshold characteristics as a function of process parameter variation such as threshold adjusting ion implant dose($D_c$), channel length(L), gate oxide thickness($T_ox$) and junction depth of source/drain($X_j$) using device simulation. The buried channel behavior with these process prarameter variation were showed apparent difference. Also, the fabricated pMOSFET device having different channel length represented good S.S value and low leakage current with increasing drain voltage.

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A study on process parameter extraction and device characteristics of nMOSFET using DTC method (DTC방법을 사용한 nMOSFET의 공정파라메터 추출 및 소자특성에 관한 연구)

  • 이철인;장의구
    • Electrical & Electronic Materials
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    • v.9 no.8
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    • pp.799-805
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    • 1996
  • In short channel MOSFET, it is very important to establish optimal process conditions because of variation of device characteristics due to the process parameters. In this paper, we used process simulator and device characteristics caused by process parameter variation. From this simulation, it has been ' derived to the dependence relations between process parameters and device characteristics. The experimental result of fabricated short channel device according to the optimal process parameters demonstrate good device characteristics.

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서브마이크론 MOSFET의 파라메터 추출 및 소자 특성 (1)

  • 서용진;장의구
    • Electrical & Electronic Materials
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    • v.7 no.2
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    • pp.107-116
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    • 1994
  • In the manufacturing of VLSI circuits, variations of device characteristics due to the slight differences in process parameters drastically aggravate the performances of fabricated devices. Therefore, it is very important to establish optimal process conditions in order to minimize deviations of device characteristics. In this paper, we used one-dimensional process simulator, SUPREM-II, and two dimensional device simulator, MINIMOS 4.0 in order to extract optimal process parameter which can minimize changes of the device characteristics caused by process parameter variation in the case of short channel nMOSFET and pMOSFET device. From this simulation, we have derived the dependence relations between process parameters and device characteristics. Here, we have suggested a method to extract process parameters from design trend curve(DTC) obtained by these dependence relations. And we have discussed short channel effects and device limitations by scaling down MOSFET dimensions.

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3-D Simulation of Thermal Multimorph Actuator based on MUMPs process

  • Klaitabtim, Don;Tuantranont, Adisorn
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.1115-1117
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    • 2005
  • This paper describes the three dimension model and simulation results of a thermal actuator based on polyMUMPs process, known as thermal multimorph actuator. The device has potential application in micro-transducers such as atomic force microscope (AFM) tip and scanning tunneling microscope (STM) tip. This device made of a multi-layer materials stack together with consisted of polysilicon, $SiO_2$ and gold. A mask layout design, three dimension model and simulation results are reported and discussed.

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Modeling of Electrical Characteristics in Poly Silicon Thin Film Transistor with Process Parameter (다결정 실리콘 박막 트랜지스터에서 공정 파라미터에 따른 전기적 특성의 모델링)

  • Jung, Eun-Sik;Choi, Young-Sik;Lee, Yong-Jae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11b
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    • pp.201-204
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    • 2001
  • In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values, So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of $I_D-V_D$ $I_D-V_G$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.

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Modeling of Electrical Characteristics in Poly Silicon Thin Film Transistor with Process Parameter (다결정 실리콘 박막 트랜지스터에서 공정 파라미터에 따른 전기적 특성의 모델링)

  • 정은식;최영식;이용재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11a
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    • pp.201-204
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    • 2001
  • In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values. So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of I$_{D}$-V$_{D}$, I$_{D}$-V$_{G}$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.ristics.

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A Study on Optimized Rudder Design by Comparison and Analysis of Design Process of Rudder Device. (대형 조선소 타 장치 설계 프로세서 비교 및 분석에 의한 표준 타 장치 설계 프로세서 제안)

  • Kim, Sang-Hyun;Kim, Hyun-Jun;Jun, Hee-Chul;Yoon, Seung-Bae
    • Journal of the Society of Naval Architects of Korea
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    • v.47 no.1
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    • pp.99-111
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    • 2010
  • Recently, a very large vessel's maneuvering performance, rudder performance and rudder design's importance is considered to be an important subject. There have been few studies on the design process of rudder device before. The aim of this paper is to investigate a design process of rudder device and to propose a generalized design process of rudder device. Firstly, we investigated the rudder device design process of Korean major shipyards. And the differences of a torque calculation method, rudder section design, maneuvering performance examination method, etc were analyzed theoretically. Secondly, the design process of rudder device was divided into concept design, initial design and detail design. In concept design, a rudder area was estimated and its validity was examined. In initial design, rudder profile and design method has been selected through rudder form determination process. And principal dimension and steering gear capacity were determined. Maneuvering performance was also examined by simulation tool. In detail design, design criteria considered in rudder initial design has been investigated thoroughly. Also a rudder torque, rudder cavitation performance and rudder structure analysis were estimated. And maneuvering performance was also examined by model test. Finally, based on the results of investigation, the design process of rudder device was generalized and proposed.

A Study on the Computer Modelling with Process Parameters for the Optimization of BiCMOS Device (Process Parameter의 Modelling에 의한 BiCMOS 소자 설계의 최적화 방안에 관한 연구)

  • Kang, Ey-Goo;Kim, Tae-Ik;Woo, Young-Shin;Lee, Kye-Hun;Sung, Man-Young;Lee, Cheol-Jin
    • Proceedings of the KIEE Conference
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    • 1994.07b
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    • pp.1460-1462
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    • 1994
  • BiCMOS is the newly developed technology that integrates both CMOS and bipolar structures on the same integrated circuit. Improved performance can be obtained from combining the advantages of high density and low power in CMOS with the speed and current capibility advantages by bipolar. However, the major drawbacks to BiCMOS are high cost, long fabrication time and difficulty of merging CMOS with bipolar without degrading of device Performance because CMOS and bipolar share same process step. In this paper, N-Well CMOS oriented BiCMOS process and optimization of device performance are studied when N-Well links CMOS with bipolar process step by 2D process and 3D Device simulation. From the simulation, Constriction of linking process step has been understood and provided to give the method of choosing BiCMOS for various analog design request.

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A Study on Process and Characteristics of nMOSFET by DTC Method (DTC에 의한 MOSFET의 공정 및 소자특성에 관한 연구)

  • 류찬형;신희갑;이철인;서용진;김태형
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1995.11a
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    • pp.236-239
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    • 1995
  • In short channel MOSFET, it is very important to establish optimal process conditions because of variation of devise characteristics due to the process parameters. In this paper, we used process simulator and device simulator in order to optimize process parameter which changes of the device characteristics caused by process parameter variation. From this simulation, it has been derived to the dependence relations between process parameter and device characteristics. The experimental results of fabricated short channel device according to the optimal process parameters demonstrate good device characteristics.

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Prediction of Multi-Physical Analysis Using Machine Learning (기계학습을 이용한 다중물리해석 결과 예측)

  • Lee, Keun-Myoung;Kim, Kee-Young;Oh, Ung;Yoo, Sung-kyu;Song, Byeong-Suk
    • Journal of IKEEE
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    • v.20 no.1
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    • pp.94-102
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    • 2016
  • This paper proposes a new prediction method to reduce times and labor of repetitive multi-physics simulation. To achieve exact results from the whole simulation processes, complex modeling and huge amounts of time are required. Current multi-physics analysis focuses on the simulation method itself and the simulation environment to reduce times and labor. However this paper proposes an alternative way to reduce simulation times and labor by exploiting machine learning algorithm trained with data set from simulation results. Through comparing each machine learning algorithm, Gaussian Process Regression showed the best performance with under 100 training data and how similar results can be achieved through machine-learning without a complex simulation process. Given trained machine learning algorithm, it's possible to predict the result after changing some features of the simulation model just in a few second. This new method will be helpful to effectively reduce simulation times and labor because it can predict the results before more simulation.