• 제목/요약/키워드: Process and device simulation

검색결과 426건 처리시간 0.035초

매몰채널 pMOSFET소자의 서브쓰레쉬홀드 특성 고찰 (Subthreshold characteristics of buried-channel pMOSFET device)

  • 서용진;장의구
    • E2M - 전기 전자와 첨단 소재
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    • 제8권6호
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    • pp.708-714
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    • 1995
  • We have discussed the buried-channel(BC) behavior through the subthreshold characteristics of submicron PMOSFET device fabricated with twin well CMOS process. In this paper, we have guessed the initial conditions of ion implantation using process simulation, obtained the subthreshold characteristics as a function of process parameter variation such as threshold adjusting ion implant dose($D_c$), channel length(L), gate oxide thickness($T_ox$) and junction depth of source/drain($X_j$) using device simulation. The buried channel behavior with these process prarameter variation were showed apparent difference. Also, the fabricated pMOSFET device having different channel length represented good S.S value and low leakage current with increasing drain voltage.

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DTC방법을 사용한 nMOSFET의 공정파라메터 추출 및 소자특성에 관한 연구 (A study on process parameter extraction and device characteristics of nMOSFET using DTC method)

  • 이철인;장의구
    • E2M - 전기 전자와 첨단 소재
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    • 제9권8호
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    • pp.799-805
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    • 1996
  • In short channel MOSFET, it is very important to establish optimal process conditions because of variation of device characteristics due to the process parameters. In this paper, we used process simulator and device characteristics caused by process parameter variation. From this simulation, it has been ' derived to the dependence relations between process parameters and device characteristics. The experimental result of fabricated short channel device according to the optimal process parameters demonstrate good device characteristics.

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서브마이크론 MOSFET의 파라메터 추출 및 소자 특성 (1)

  • 서용진;장의구
    • E2M - 전기 전자와 첨단 소재
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    • 제7권2호
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    • pp.107-116
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    • 1994
  • In the manufacturing of VLSI circuits, variations of device characteristics due to the slight differences in process parameters drastically aggravate the performances of fabricated devices. Therefore, it is very important to establish optimal process conditions in order to minimize deviations of device characteristics. In this paper, we used one-dimensional process simulator, SUPREM-II, and two dimensional device simulator, MINIMOS 4.0 in order to extract optimal process parameter which can minimize changes of the device characteristics caused by process parameter variation in the case of short channel nMOSFET and pMOSFET device. From this simulation, we have derived the dependence relations between process parameters and device characteristics. Here, we have suggested a method to extract process parameters from design trend curve(DTC) obtained by these dependence relations. And we have discussed short channel effects and device limitations by scaling down MOSFET dimensions.

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3-D Simulation of Thermal Multimorph Actuator based on MUMPs process

  • Klaitabtim, Don;Tuantranont, Adisorn
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.1115-1117
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    • 2005
  • This paper describes the three dimension model and simulation results of a thermal actuator based on polyMUMPs process, known as thermal multimorph actuator. The device has potential application in micro-transducers such as atomic force microscope (AFM) tip and scanning tunneling microscope (STM) tip. This device made of a multi-layer materials stack together with consisted of polysilicon, $SiO_2$ and gold. A mask layout design, three dimension model and simulation results are reported and discussed.

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다결정 실리콘 박막 트랜지스터에서 공정 파라미터에 따른 전기적 특성의 모델링 (Modeling of Electrical Characteristics in Poly Silicon Thin Film Transistor with Process Parameter)

  • 정은식;최영식;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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    • pp.201-204
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    • 2001
  • In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values, So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of $I_D-V_D$ $I_D-V_G$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.

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다결정 실리콘 박막 트랜지스터에서 공정 파라미터에 따른 전기적 특성의 모델링 (Modeling of Electrical Characteristics in Poly Silicon Thin Film Transistor with Process Parameter)

  • 정은식;최영식;이용재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 추계학술대회 논문집
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    • pp.201-204
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    • 2001
  • In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values. So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of I$_{D}$-V$_{D}$, I$_{D}$-V$_{G}$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.ristics.

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대형 조선소 타 장치 설계 프로세서 비교 및 분석에 의한 표준 타 장치 설계 프로세서 제안 (A Study on Optimized Rudder Design by Comparison and Analysis of Design Process of Rudder Device.)

  • 김상현;김현준;전희철;윤승배
    • 대한조선학회논문집
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    • 제47권1호
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    • pp.99-111
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    • 2010
  • Recently, a very large vessel's maneuvering performance, rudder performance and rudder design's importance is considered to be an important subject. There have been few studies on the design process of rudder device before. The aim of this paper is to investigate a design process of rudder device and to propose a generalized design process of rudder device. Firstly, we investigated the rudder device design process of Korean major shipyards. And the differences of a torque calculation method, rudder section design, maneuvering performance examination method, etc were analyzed theoretically. Secondly, the design process of rudder device was divided into concept design, initial design and detail design. In concept design, a rudder area was estimated and its validity was examined. In initial design, rudder profile and design method has been selected through rudder form determination process. And principal dimension and steering gear capacity were determined. Maneuvering performance was also examined by simulation tool. In detail design, design criteria considered in rudder initial design has been investigated thoroughly. Also a rudder torque, rudder cavitation performance and rudder structure analysis were estimated. And maneuvering performance was also examined by model test. Finally, based on the results of investigation, the design process of rudder device was generalized and proposed.

Process Parameter의 Modelling에 의한 BiCMOS 소자 설계의 최적화 방안에 관한 연구 (A Study on the Computer Modelling with Process Parameters for the Optimization of BiCMOS Device)

  • 강이구;김태익;우영신;이계훈;성만영;이철진
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 C
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    • pp.1460-1462
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    • 1994
  • BiCMOS is the newly developed technology that integrates both CMOS and bipolar structures on the same integrated circuit. Improved performance can be obtained from combining the advantages of high density and low power in CMOS with the speed and current capibility advantages by bipolar. However, the major drawbacks to BiCMOS are high cost, long fabrication time and difficulty of merging CMOS with bipolar without degrading of device Performance because CMOS and bipolar share same process step. In this paper, N-Well CMOS oriented BiCMOS process and optimization of device performance are studied when N-Well links CMOS with bipolar process step by 2D process and 3D Device simulation. From the simulation, Constriction of linking process step has been understood and provided to give the method of choosing BiCMOS for various analog design request.

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DTC에 의한 MOSFET의 공정 및 소자특성에 관한 연구 (A Study on Process and Characteristics of nMOSFET by DTC Method)

  • 류찬형;신희갑;이철인;서용진;김태형
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 추계학술대회 논문집
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    • pp.236-239
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    • 1995
  • In short channel MOSFET, it is very important to establish optimal process conditions because of variation of devise characteristics due to the process parameters. In this paper, we used process simulator and device simulator in order to optimize process parameter which changes of the device characteristics caused by process parameter variation. From this simulation, it has been derived to the dependence relations between process parameter and device characteristics. The experimental results of fabricated short channel device according to the optimal process parameters demonstrate good device characteristics.

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기계학습을 이용한 다중물리해석 결과 예측 (Prediction of Multi-Physical Analysis Using Machine Learning)

  • 이근명;김기영;오웅;유성규;송병석
    • 전기전자학회논문지
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    • 제20권1호
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    • pp.94-102
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    • 2016
  • 본 논문에서는 기계학습 알고리즘을 이용하여 다중물리(Multi-physics) 시뮬레이션의 반복 횟수를 획기적으로 줄일 수 있는 다중물리해석 예측 방법을 제안한다. 기존의 다중물리해석 시뮬레이션의 경우 소요되는 시간과 노력을 줄이기 위해 시뮬레이션 자체에 대한 방법과 환경 개선에 초점이 맞추어져 있으나 본 논문에서는 다중물리 시뮬레이션 결과를 기계학습 알고리즘으로 학습하여 추가적인 시뮬레이션을 수행하지 않고 학습된 기계학습 알고리즘을 사용하여 수십분에서 수시간에 걸리는 다중 물리 해석과 유사한 결과를 수초 내에 예측할 수 있음을 보였다. 기계학습 알고리즘 간의 성능을 비교하여 다중물리해석에 적합한 기계학습 알고리즘을 확인하였으며 가장 우수한 성능을 보인 가우시안 프로세스 회귀(Gaussian Process Regression)의 경우 100개 이하의 학습 샘플만으로도 우수한 예측 결과를 얻어낼 수 있음을 확인하였다. 제안하는 방식을 통해 시뮬레이션을 하고자 하는 모델의 형상이나 재질이 변경될 경우 기존의 시뮬레이션 결과로 학습된 알고리즘이 있다면 시뮬레이션을 반복 수행하기 전에 알고리즘을 이용하여 결과를 예측할 수 있어 시뮬레이션의 반복 횟수를 줄일 수 있을 것으로 기대한다.