• 한국정보통신설비학회:학술대회논문집
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• 2006.08a
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• pp.170-174
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• 2006

In this paper electromagnetic topology (EMT) is used to analyze the lumped components on printed circuit boards (PCBs). It is difficult to obtain desirable results about the electromagnetic coupling problems by using a numerical or an experimental method on complex systems. The EMT can be considered as a helpful method to the analysis of electromagnetic interference / electromagnetic compatibility (EMI/EMC) problems in the complex system. To verify the validity of this method, three types of the PCBs mounting a simple circuit are fabricated and experimented.

• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.289-296
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• 1999

The integration of the LSI has been greatly improved and the circuit patters on the LSI are becoming finer line and pitch. The high-density electronic packaging technology is improved. In order to realize the high-density packaging technology, the density of the circuit wiring of the printed circuit boards have also been more dense. The build-up process multilayer printed circuit board technology have a lot of vias, possibilities of the finer conductor wirings and have a freedom of capabilities of wiring design. The build-up process printed circuit boards have the wiring rules which are the pattern width: $100-20\mu\textrm{m}$, the via hole diameter: $100-50\mu\textrm{m}$. There three kinds of build-up processes as far materials and hole drilling. In this paper, the recent technology trends of the build-up printed circuit board technologies are described.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.3
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• pp.95-103
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• 1993

A noise simulation software is developed to estimate crosstalk and reflection noise in multi-layer printed circuit boards having upto 20 layers and carrying signals of 100 MHz range. The simulation software can handle up to 1000 nets yielding accurate noise value associated with each net. The calculation results can be used to build optimal printed citcuit boards used in high speed computers and telecommunication equipments.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.8
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• pp.26-40
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• 2000

• Journal of Electrochemical Science and Technology
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• v.13 no.2
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• pp.186-198
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• 2022

Heavy metals recovery from Printed Circuit Boards industrial wastewater is crucial because of its cost effectiveness and environmental friendliness. In this study, a copper recovery route combining the sequential processes of acid leaching and LIX 984N extracting with an electrowinning technique from Printed Circuit Boards production's sludge was performed. The used residual sludge was originated from Hanoi Urban Environment One Member Limited Company (URENCO). The extracted solution from the printed circuit boards waste sludge containing a high copper concentration of 19.2 g/L and a small amount of iron (0.575 ppm) was used as electrolyte for the subsequent electrolysis process. By using a simulation model for multi-step current electrolysis, the reasonable current densities for an electrolysis time interval of 30 minutes were determined, to optimize the specific consumption energy for the copper recovery. The mathematical simulation model was built to calculate the important parameters of this process.

• ETRI Journal
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• v.38 no.5
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• pp.903-910
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• 2016

We propose a novel multi-stack (MS) technique for a compact and wideband electromagnetic bandgap (EBG) structure in high-speed multilayer printed circuit boards. The proposed MS technique efficiently converts planar EBG arrays into a vertical structure, thus substantially miniaturizing the EBG area and reducing the distance between the noise source and the victim. A dispersion method is presented to examine the effects of the MS technique on the stopband characteristics. Enhanced features of the proposed MS-EBG structure were experimentally verified using test vehicles. It was experimentally demonstrated that the proposed MS-EBG structure efficiently suppresses the power/ground noise over a wideband frequency range with a shorter port-to-port spacing than the unit-cell length, thus overcoming a limitation of previous EBG structures.

• IE interfaces
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• v.13 no.2
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• pp.195-203
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• 2000

This paper considers the problem of sequencing printed circuit boards(PCBs) on an automatic surface mount device(SMD) placement machine in order to minimize total setup time. Since the total set of component feeders needed by all boards cannot be loaded simultaneously on the magazine, the setup must be made between two successive boards in the sequence. It is assumed that the setup time depends on the number of component feeders to be replaced in the magazine. An important characteristic is that each feeder occupies a different number of slots in the magazine. This problem is equivalent to travelling salesman problem(TSP) except that the distances between two cities, that is, the setup times between two boards, are not known in advance. So, TSP-based heuristics with new distance functions are presented and their performances are compared through various test problems. Computational results indicate that our heuristics outperform existing methods.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2375-2378
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• 2003

In manufacture of printed circuit boards, one important issue is precisely to measure the three-dimensional shape of the solder paste silk-screened prior to direct surface mounting of chips. This paper presents the 3D shape reconstruction of solder paste using the optical triangulation method based on structured light or slit beam and the measurement algorithm for height, volume. area, and coplanarity on component pads from the 3D range image. Futhermore, statistical process control function is incorporated for process capability analysis.

• Journal of the Korean Society of Safety
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• v.13 no.2
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• pp.22-29
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• 1998

The natural convection cooling of simulated electronic chips located on a printed circuit board(PCB) has been studied by Computer Aided Engineering(CAE). In CAE, 3-dimensional finite element model of simulated electronic chip was made to accomplish heat transfer analysis at each design stage of a printed circuit boards for thermal optimization. The simulated electronic chips are installed protrudent from the plate about 3mm. The materials the plates are epoxy and aluminum. The results show that the chip with relatively high heat generation rates should not be close to each other. It is found, as well that cooling effect for the aluminum plate is superior to the epoxy plate and location of maximum temperature is significantly influenced by the structure variation of PCB. In developing PCB and electronic chips, it's recommended that CAE is very useful to estimate to the distribution of temperature.

• Journal of Environmental Science International
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• v.24 no.2
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• pp.245-251
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• 2015

The main objective of this study is to recovery valuable metals with metal particle size distributions in waste cell phone PCBs(Printed Circuit Boards) by means of pulverization and nitric acid process. The particle size classifier also was evaluated by specific metal contents. The PCBs were pulverized by a fine pulverizer. The particle sizes were classified by 5 different sizes which were PcS1(0.2 mm below), PcS2(0.20~0.51 mm), PcS3(0.51~1.09 mm), PcS4(1.09~2.00 mm) and PcS5(2.00 mm above). Non-magnetic metals in the grinding particles were separated by a hand magnetic. And then, Cu, Co and Ni were separated by 3M nitric acid. Particle diameter of PCBs were 0.388~0.402 mm after the fine pulverizer. The sorting coefficient were 0.403~0.481. The highest metal content in PcS1. And the bigger particle diameter, the lower the valuable metals exist. The recovery rate of the valuable metals increases in smaller particle diameter with same leaching conditions. For further work, it could improve to recovery of the valuable metals effectively by means of individual treatment, multistage leaching and different leaching solvents.