• Title/Summary/Keyword: Printed Circuit Board (PCB)

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Analysis of Surface Characteristics for Clad Thin Film Materials (극박형 복합재료 필름의 표면 물성 분석에 대한 연구)

  • Lee, Jun Ha
    • Journal of the Semiconductor & Display Technology
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    • v.17 no.1
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    • pp.62-65
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    • 2018
  • In the era of the 4th Industrial Revolution, IoT products of various and specialized fields are being developed and produced. Especially, the generation of the artificial intelligence, robotic technology Multilayer substrates and packaging technologies in the notebook, mobile device, display and semiconductor component industries are demanding the need for flexible materials along with miniaturization and thinning. To do this, this work use FCCL (Flexible Copper Clad Laminate), which is a flexible printed circuit board (PCB), to implement FPCB (Flexible PCB), COF (Chip on Film) Use is known to be essential. In this paper, I propose a transfer device which prevents the occurrence of scratches by analyzing the mechanism of wrinkle and scratch mechanism during the transfer process of thin film material in which the thickness increases while continuously moving in air or solution.

A Cost-Effective 40-Gb/s ROSA Module Employing Compact TO-CAN Package

  • Kang, Sae-Kyoung;Lee, Joon Ki;Huh, Joon Young;Lee, Jyung Chan;Kim, Kwangjoon;Lee, Jonghyun
    • ETRI Journal
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    • v.35 no.1
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    • pp.1-6
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    • 2013
  • In this paper, we present an implemented serial 40-Gb/s receiver optical subassembly (ROSA) module by employing a proposed TO-CAN package and flexible printed circuit board (FPCB). The TO-CAN package employs an L-shaped metal support to provide a straight line signal path between the TO-CAN package and the FPCB. In addition, the FPCB incorporates a signal line with an open stub to alleviate signal distortion owing to an impedance mismatch generated from the soldering pad attached to the main circuit board. The receiver sensitivity of the ROSA module measures below -9 dBm for 40 Gb/s at an extinction ratio of 7 dB and a bit error rate of $10^{-12}$.

Improvement of Electrodeposition Rate of Cu Layer by Heat Treatment of Electroless Cu Seed Layer (Cu Seed Layer의 열처리에 따른 전해동도금 전착속도 개선)

  • Kwon, Byungkoog;Shin, Dong-Myeong;Kim, Hyung Kook;Hwang, Yoon-Hwae
    • Korean Journal of Materials Research
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    • v.24 no.4
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    • pp.186-193
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    • 2014
  • A thin Cu seed layer for electroplating has been employed for decades in the miniaturization and integration of printed circuit board (PCB), however many problems are still caused by the thin Cu seed layer, e.g., open circuit faults in PCB, dimple defects, low conductivity, and etc. Here, we studied the effect of heat treatment of the thin Cu seed layer on the deposition rate of electroplated Cu. We investigated the heat-treatment effect on the crystallite size, morphology, electrical properties, and electrodeposition thickness by X-ray diffraction (XRD), atomic force microscope (AFM), four point probe (FPP), and scanning electron microscope (SEM) measurements, respectively. The results showed that post heat treatment of the thin Cu seed layer could improve surface roughness as well as electrical conductivity. Moreover, the deposition rate of electroplated Cu was improved about 148% by heat treatment of the Cu seed layer, indicating that the enhanced electrical conductivity and surface roughness accelerated the formation of Cu nuclei during electroplating. We also confirmed that the electrodeposition rate in the via filling process was also accelerated by heat-treating the Cu seed layer.

A variably compliable probe system for the in-circuit test of a PCB (인쇄회로기판의 통전검사를 위한 가변순응력을 갖는 프로브 시스템)

  • Shim, Jae-Hong;Cho, Hyung-Suck;Kim, Sung-Kwun
    • Journal of Institute of Control, Robotics and Systems
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    • v.3 no.3
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    • pp.323-331
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    • 1997
  • A new probing mechanism and an active compliance control algorithm have been developed for the in-circuit test of a PCB( printed circuit board ). Commercially available robotic probing devices are incapable of controlling contact force generated through rigid probe contacts with a solder joint, at high speed. The uncontrollable excessive contact force often brungs about some defects on the surface of the solder joint, which is plastically deformable over some limited contact force. This force also makes unstable contact motions resulting in unreliable test data. To overcome these problems, we propose that a serially connected macro and micro device with active compliance provide the best potential for a safe and reliable in-circuit test. This paper describes the design characteristics, modeling and control scheme of the newly proposed device. The experimental results clearly show the effectiveness of the proposed system.

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Analysis of Emission Characteristics of DC/DC Converter by Component Placement (부품배치에 따른 DC/DC 컨버터의 Emission 특성분석)

  • Park, Jin-Hong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.2
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    • pp.639-643
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    • 2018
  • As electronic systems become smaller and more portable, the need for power conversion continues to increase. In addition, system stability must be ensured from switching noise due to power conversion efficiency and power conversion system miniaturization. Therefore, countermeasures to reduce switching noise during power conversion are essential. In this paper, a DC/DC buck converter circuit is constructed, and the characteristics of switching noise generated when changing the parts layout in a four-layer printed circuit board (PCB) structure with a reference plane are compared and analyzed. In addition, switching noise characteristics were compared and analyzed through simulations when the parts layout was different in a two-layer PCB structure from which the reference planes were removed. As a result, it was confirmed that the radiated emissions characteristic is reduced by 12dB and the conducted emissions characteristic decreased by 7dB to 8dB, according to the current return path in the four-layer PCB structure. Thus, it was confirmed that the noise characteristics can be improved according to the configuration of the current return path when the power conversion circuit is designed.

Effects of Organic Additives on Residual Stress and Surface Roughness of Electroplated Copper for Flexible PCB

  • Kim, Jongsoo;Kim, Heesan
    • Corrosion Science and Technology
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    • v.6 no.4
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    • pp.154-158
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    • 2007
  • For the application of flexible printed circuit board (FPCB), electroplated copper is required to have low surface roughness and residual stress. In the paper, the effects of surface roughness and residual stress of electroplated copper as thick as $8{\mu}m$ were studied on organic additives such as inhibitor, leveler and accelerator. Polyimide film coated with sputtered copper was used as a substrate. Surface roughness and surface morphology were measured by 3D-laser surface analysis and FESEM, respectively. Residual stress was calculated by Stoney's equation after measuring radius curvature of specimen. The addition of additives except high concentration of accelerator in the electrolyte decreased surface roughness of electroplated copper film. Such a tendency was explained by the function of additives among which the inhibitor and the leveler inhibit electroplating on a whole surface and prolusions, respectively. The accelerator plays a role in accelerating the electroplating in valley parts. The inhibitors and the leveler increased residual stress, whereas the accelerator decreased it. It was thought to be related with entrapped additives on electroplated copper film rather than the preferred orientation of electroplated copper film. The reason why additives lead to residual stress remains for the future work.

A Design of New Real Time Monitoring Embedded Controller using Boundary Scan Architecture (경계 주사 구조를 이용한 새로운 실시간 모니터링 실장 제어기 설계)

  • 박세현
    • Journal of Korea Multimedia Society
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    • v.4 no.6
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    • pp.570-578
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    • 2001
  • Boundary scan architecture test methodology was introduced to facilitate the testing of complex printed circuit board. The boundary scan architecture has a tremendous potential for real time monitoring of the operational status of a system without interference of normal system operation. In this paper, a new type of embedded controller for real time monitoring of the operational status of a system is proposed and designed by using boundary scan architecture. The proposed real time monitoring embedded controller consists of test access port controller and an embedded controller proposed real time monitoring embedded controller using boundary scan architecture can save the hard-wire resource and can easily interface with boundary scan architecture chip. Experimental results show that the real time monitoring using proposed embedded controller is more effective then the real time monitoring using host computer.

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A study on the Optimum Design of an Inverted-F Antenna for the Bluetooth system (블루투스용 역-F형 안테나 최적 설계에 관한 연구)

  • Kim, Kab-Ki;Park, Gyei-Kark
    • Journal of Navigation and Port Research
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    • v.28 no.1
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    • pp.31-36
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    • 2004
  • In this paper, the characteristics of an inverted-F antenna for the 2.4GHz(ISM) Bluetooth system have been analysed in terms of the variation of design parameters. The antenna can be integrated on printed circuit board, and the characteristics in terms of the variation of the gap between feed line and shorting stub, gap between antenna's leg and ground plane, antenna leg's width, substrate's height and dielectric constant are analysed By using these characterization plot of design parameter, the tuning techniques are proposed to design optimum antenna. The designed antenna has 6.3%(150MHz) frequency bandwidth for VSWR under 1.5, and 3dBi gain.

Characteristics of BMN Thin Films Deposited on Various Substrates for Embedded Capacitor Applications (임베디드 커패시터의 응용을 위해 다양한 기판 위에 평가된 BMN 박막의 특성)

  • Ahn, Kyeong-Chan;Kim, Hae-Won;Ahn, Jun-Ku;Yoon, Soon-Gil
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.4
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    • pp.342-347
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    • 2007
  • $Bi_6Mg_2Nb_4O_{21}(BMN)$ thin films were deposited at various substrates by sputtering system for embedded capacitor applications. BMN thin films deposited at room temperature are manufactured as MIM(Metal/Insulator/Metal) structures. Dielectric properties and leakage current density were investigated as a function of various substrates and thickness of BMN thin films. Leakage current density of BMN thin films deposited on CCL(Copper Clad Laminates) showed relatively high value ($1{\times}10^{-3}A/cm^2$) at an applied field of 300 kV/cm on substrates, possibly due to relatively high value of roughness(rms $50{\AA}$) of CCL substrates. 100 nm-thick BMN thin films deposited on Cu/Ti/Si substrates showed the capacitance density of $300 nF/cm^2$, a dielectric constant of 32, a dielectric loss of 2 % at 100 kHz and the leakage current density of $1{\times}10^{-6}A/cm^2$ at an applied field of 300 kV/cm. BMN capacitors are expected to be promising candidates as embedded capacitors for printed circuit board(PCB).

Analysis of Impedance Models on Flexible PCB Transmission Line (연성 PCB 전송라인을 위한 특성 임피던스 모델의 모의 분석)

  • Part, Jong-Kang;Byun, Yong-Ki;Kim, Jong-Tae
    • Proceedings of the KIEE Conference
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    • 2005.07d
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    • pp.3022-3024
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    • 2005
  • 연성 PCB(flexible printed circuit board)는 현재 노트북 PC와 디지털 카메라등에 적용되며, 굴곡성이 강하고 소형화 및 조립에 용이하여 주로 기판 사이나주기판과 외부 커넥터사이에 데이터의 전송매체로써 널리 사용되는 핵심부품이다. 근래에 개발되는 PCB 기반의 고성능 신호처리회로들은 데이터 전송율이 수백 MHz에서 수 GHz에 이르고 있으며, 신호선과 유전체, 접지판의 구조적 특성에 따라서, 반사 효과와 같은 신호무결성 문제들이 파생되어 신호의 최대성능을 제한하게된다. 이에 따라 적절한 임피던스 제어를 통하여 고성능신호들의 왜곡을 상쇄시키는 기술이 중요하게 되었다. 본 논문에서는 연성 PCB 전송라인을 위한 임피던스 모델을 대상으로 각 모델의 주요 특징 및 정확성을 분석하였다. 연성 PCB의 전송라인은 보통 전통적인 마이크로스트립 라인의 특성 임피던스 모델에 비해 신호선의 너비가 크며, 이를 반영한 개선된 수학적 임피던스 모델들이 제안되어 있다. 따라서 본 논문은 기존의 마이크로스트립 전송라인과 연성 PCB 전송라인에 적합한 수학적 모델들을 이용하여 신호 무결성 문제를 모의할 수 있는 CAE(computer-aided engineering) 도구의 임피던스 측정 결과를 비교 및 분석하였다.

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