• Journal of the Korean Society of Industry Convergence
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• v.26 no.6_2
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• pp.1097-1108
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• 2023

Recently, demand for technology for energy economy and stable supply is increasing due to the increase in power demand of loads. The amount of DC power generation using new and renewable energy is noticeably increasing, and the use of DC power supplies is also increasing due to the increase in electric vehicles and digital loads. During parallel operation to increase the capacity of the power converter, the module bus method or the method using Can communication and serial communication has significant difficulties in smooth operation due to communication time delay for information sharing. Synchronization of information sharing of each power converter is essential for smooth parallel operation, and minimization of communication time delay is urgently needed as a way to overcome this problem. In this paper, a new communication method using pulse width information is proposed as a communication method specialized for parallel operation of power converters to compensate for the disadvantage of communication transmission delay in the existing system. The proposed communication method has the advantage of being easily implemented using the PWM and Capture function of the microcomputer. In addition, the DC/DC converter for DC distribution was verified through simulation and experiment, and it has the advantage of easy capacity expansion when applied to parallel operation of various types of power converters as well as DC/DC converters.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.8
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• pp.2722-2742
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• 2014

We propose methods of linear transceiver design for two different power constraints, sum relay power constraint and per relay power constraint, which determine signal processing matrices such as base station (BS) transmitter, relay precoders and user receivers to minimize sum mean square error (SMSE) for multi-relay multi-user (MRMU) networks. However, since the formulated problem is non-convex one which is hard to be solved, we suboptimally solve the problems by defining convex subproblems with some fixed variables. We adopt iterative sequential designs of which each iteration stage corresponds to each subproblem. Karush-Kuhn-Tucker (KKT) theorem and SMSE duality are employed as specific methods to solve subproblems. The numerical results verify that the proposed methods provide comparable performance to that of a full relay cooperation bound (FRCB) method while outperforming the simple amplify-and-forward (SAF) and minimum mean square error (MMSE) relaying in terms of not only SMSE, but also the sum rate.

• Journal of electromagnetic engineering and science
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• v.12 no.4
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• pp.290-292
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• 2012

This paper proposes a setup for a best multisine design method that uses a time-domain optimization. The method is based on minimization of the time-domain error, so its resulting multisine has a very accurate ACLR estimation. This is because its probability distribution and sample-to-sample correlation are close to those of the original signal, which are crucial for the testing of nonlinear power amplifiers. In addition, a hyperbolic-tangent function is introduced to control the ripple of tone magnitudes within signal bandwidth. For the verification, multisines were generated and compared for many aspects such as normalized error, in-band ripple, and ACLR estimation. Test results with different numbers of tones provide supporting evidence that the suggested multisine design has better ripple suppression, by up to 7 dB, and better accuracy, by up to 0.2 dB, when compared to the conventional method. The accuracy of the ACLR was improved by about 5 dB when the number of tones was 4. The suggested method improves the ACLR estimation performance of multisine testing due to its closer resemblance to the target modulation signal.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.5
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• pp.434-441
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• 2016

This paper deals with transformer turns ratio design with the consideration of loss minimization in isolated bidirectional DC-DC converter. Generally, the rms value of current, magnitude of current at switching instance, and duty ratio of a converter vary according to the turns ratio of an isolation transformer in the converter under the same voltages and output power level. Therefore, the transformer turns ratio has an effect on the total loss in a converter. The switching and conduction losses of IGBTs and MOSFETs consisting of dual-active bridge converter are analyzed, and iron and copper losses in an isolation transformer and inductor are calculated. Total losses are calculated and measured in cases of four different transformer turns ratios through simulation and experiment with 3-kW converter, and an optimum turns ratio that provides minimum losses is found. The usefulness of the proposed transformer turns ratio design approach is verified through simulation and experimental results.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1398-1408
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• 2018

In order to further improve the steady-state control performance of model predictive torque control (MPTC), a double-vector-based model predictive torque control without a weighting factor is proposed in this paper. The extended voltage vectors synthesized by two basic voltage vectors are used to increase the number of feasible voltage vectors. Therefore, the control precision of the torque and the stator flux along with the steady-state performance can be improved. To avoid testing all of the feasible voltage vectors, the solution of deadbeat torque control is calculated to predict the reference voltage vector. Thus, the candidate voltage vectors, which need to be evaluated by a cost function, can be reduced based on the sector position of the predicted reference voltage vector. Furthermore, a cost function, which only includes a reference voltage tracking error, is designed to eliminate the weighting factor. Moreover, two voltage vectors are applied during one control period, and their durations are calculated based on the principle of reference voltage tracking error minimization. Finally, the proposed method is tested by simulations and experiments.

• Journal of Electrical Engineering and Technology
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• v.4 no.4
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• pp.467-475
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• 2009

Congestion management is one of the technical challenges in power system deregulation. This paper presents single objective and multi-objective optimization approaches for optimal choice, location and size of Static Var Compensators (SVC) and Thyristor Controlled Series Capacitors (TCSC) in deregulated power system to improve branch loading (minimize congestion), improve voltage stability and reduce line losses. Though FACTS controllers offer many advantages, their installation cost is very high. Hence Independent System Operator (ISO) has to locate them optimally to satisfy a desired objective. This paper presents optimal location of FACTS controllers considering branch loading (BL), voltage stability (VS) and loss minimization (LM) as objectives at once using GA. It is observed that the locations that are most favorable with respect to one objective are not suitable locations with respect to other two objectives. Later these competing objectives are optimized simultaneously considering two and three objectives at a time using multi-objective Strength Pareto Evolutionary Algorithms (SPEA). The developed algorithms are tested on IEEE 30 bus system. Various cases like i) uniform line loading ii) line outage iii) bilateral and multilateral transactions between source and sink nodes have been considered to create congestion in the system. The developed algorithms show effective locations for all the cases considered for both single and multiobjective optimization studies.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.4
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• pp.313-320
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• 2003

This paper deals with the optimal design of a elevator inverter system based on the customized IPM. The proposed method reduces dv/dt and di/dt, which resulted in the minimized conducted EMI noise without an additional circuitry. It only optimizes the value of gate resistor in the IGBT embedded in the IPM. In order to optimize the customized IPM to a elevator system, we simulated and measured the spike voltage and the motor surge voltage including the temperature variation due to the switching losses at the IPM case and heat-sink. As a result, thanks to the optimized value of the gate resister in the IPM, the conducted EMI noise is reduced approx. 5∼10 [dB$\mu$V] in a particular frequency domain.

• Proceedings of the KIEE Conference
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• 2002.07a
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• pp.87-89
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• 2002

This paper presents a new approach using an Improved branch exchange (IBE) technique to maximize the voltage stability as well as loss minimization in radial power systems. A suitable voltage stability index (VSI) for optimal routing algorithm is developed using novel methods both a critical transmission path based on a voltage phasor approach and an equivalent impedance method. Furthermore, the proposed algorithm can automatically detect the critical transmission path to be reached to a critical load faced with voltage collapse due to additional real or reactive leading. To develop an effective optimization technique, we also have applied a branch exchange algorithm based on a newly derived index of loss change. The proposed IBE algorithm for VSI maximization can effectively search the optimal topological structures of distribution feeders by changing the open/closed states of the sectionalizing and tie switches. The proposed algorithm has been tested with the various radial power systems to show its favorable performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.37-42
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• 2008

In H.264/AVC decoder, intra predictor, motion compensator, and deblocking filter need to read reference images in external frame memory in decoding process. They read external frame memory very frequently, which lowers system operation speed and increases power consumption. This paper proposes a intra predictor integrated with motion compensator without external frame memory. It achieves power reduction and memory bandwidth minimization by exploiting data reuse of common and repetitive pixels. The proposed infra predictor achieves more than $45%\;{\sim}\;75%$ cycle time reduction compared with conventional intra predictors.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.9
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• pp.142-151
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• 1995

The trend of compact size, light weight, low power consumption in the portable telecommunication equipments demands large scale integration and low voltage operation of chips and the minimization of the number of the components in the telecommunication terminal. According to the trend, existing chip components are modulized and are integrated as a part into a bigger chip. This paper is about the development of the peripheral units of micro-controller for mobile telecommunication terminal. Peripherals consist of DMA controller, Interrupt controller, timer, watchdog timer, clock generator, and power management unit. They are designed to be integrated with EU(Execution Unit) and BIU(Bus Interface Unit) into a 16 bit micro-controller which will be used as a core of an ASIC for next generation digital mobile telecommunication terminal. At first, whole block of the micro-controller was described by VHDL behavioral model and simulated to verify its overall operation. Then, watchdog timer, clock generator and power management unit were directly synthesized by using VHDL synthesis tool. Rest of the pheriperal units were designed and simulated by using Compass Design Tool.