• The Magazine of the IEIE
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• v.35 no.7
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• pp.57-71
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• 2008

The last decade has witnessed great improvements in power semiconductor devices thanks to the advanced design and process, which have made it possible to significantly improve the electrical performances of electronic systems while simultaneously reducing their site, weight and perhaps most importantly reducing their cost. Among the power semiconductor devices, IGBT will be a key semiconductor component for power industry since it has a huge potential to cover large areas of power electronics from small home appliances to heavy industries. Currently, only a few limited power semiconductor manufacturers supply most of the industrial consumptions of power IGBT and its modules. Therefore, a large portion of technology in the power industry is dependent on other advanced countries. In this regard, to independently build power IGBT devices and the relevant power module technology, Korean government initiated a new 5-year project 'Power IT,' which also aimed at booming the business of the power semiconductor and the allied industries. With the success of this power IT project, it is expected that the power semiconductor technology will be a basis to foster the high power semiconductor industry and moreover, there will be more innovative developments in the Korea region and globally Also, forming the channel between the customers and suppliers, it is possible to effectively develop the customized power products, which could strengthen the competitiveness of Korean power industry. Furthermore, the power industry including semiconductor manufacturers will be technologically self-supporting and be able to obtain good business opportunities, and eventually increase the share in the growing power semiconductor market, which could be positioned as a major industry in Korea.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.4
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• pp.221-228
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• 2005

In this work, our goal is to develop a fast and accurate power model of the ARM926EJ-S processor in the industrial design environment. Compared with existing work on processor power modeling which focuses on the power states of processor core, our model mostly focuses on the cache power model. It gives more than 93% accuracy and 1600 times speedup compared with post-layout gate-level power estimation. We also address two practical issues in applying the processor power model to the real design environment. One is to incorporate the power model into an existing commercial instruction set simulator. The other is the re-characterization of power model parameters to cope with different gate-level netlists of the processor obtained from different design teams and different fabrication technology.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.13-18
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• 2004

전력계통 분야에서는 HVDC 전력변환소, BTB, UPFC 및 SVC의 안정성 향상 및 안정적인 운용을 위한 체계적인 유지보수 및 관리가 필요하다. 특히 전력계통에 접속된 대용량 전력반도체 소자인 사이리스터 밸브는 운전중에 열적, 전기적인 스트레스를 받게 되며, 이로 인해 밸브의 수명이 감소하여 전력계통의 안정적인 운용을 어렵게 만드는 요인이 된다. 따라서 전력계통 운용의 안정성을 확보하기 위해서는 대용량 사이리스터 밸브의 열적, 전기적 스트레스에 따른 수명 변화를 예측하는 열화진단 기법의 개발이 중요하다. 본 고에서는 대용량 사이리스터 소자의 열화진단 기법에 대한 국내외 현황과 현재 연구가 진행중인 열화 진단 기법에 대해 서술하였으며, 1500V급 사이리스터 소자의 가속열화 실험을 통해 소자의 수명을 예측한 결과를 나타내었다.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.397-398
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• 2013

Fairchild Green Mode off line buck switch for low standby power consumption and high reliability is presented. By reducing operating current and optimizing switching frequency, 20mW power consumption is achieved. High performance trans-conductance amplifier and green mode function improve the ripple and regulation in the output voltage. The conventional $FPS^{TM}$ buck and novel Fairchild buck switch are compared to show the improvement of performance. Experimental results are showed using 2W evaluation board.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1977-1979
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• 2005

열저항 측정법에는 정상상태보다는 과도응답 특성을 이용하는 것이 우수한 것으로 20년부터 알려져 왔다. 온도를 시간의 함수로 나타내는 열적 계단응답함수를 이용하면 칩에서 주위 분위기, 냉각장치 또는 마운트를 포함한 열 임피던스를 측정할 수 있다. 소자 접합부의 열적 동특성을 측정함으로써 칩 주변의 기하학적 물질에 대한 특성을 파악할 수 있으며 나아가 측정으로부터 소자의 열적 구조를 유추할 수 있다. 본 논문에서는 열적 계단응답 특성을 이용한 열 임피던스 측정이론 및 원리에 대해서 개관하였다.

• Proceedings of the KIEE Conference
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• summer
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• pp.1531-1533
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• 2004

Standby power is progressively important in the developed countries including Korea. The status of standby power of korean home electronic wares has been unknown. In this paper, standby power consumption of home electronics in Korea has been firstly surveyed and reported. Over 800 pieces of electrical equipments that consume standby power in 53 households were investigated. The average standby power per equipment and total standby power per household were 3.66W and 57.0W, respectively. It was revealed that Audio systems and network appliances such as xDSL modem, set-top box generally consume high standby power.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.280-283
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• 2004

This paper discribes the design concept, fabrication process and measuring result of 2.5kV Gate Commutated Thyristor devices. Integrated gate commutated thyristors(IGCTs) is the new power semiconductor device used for high power inverter, converter, static var compensator(SVC) etc. Most of the ordinary GTOs(gate turn-off thyristors) are designed as non-punch-through(NPT) concept; i.e. the electric field is reduced to zero within the N-base region. In this paper, we propose transparent anode structure for fast turn-off characteristics. And also, to reach high breakdown voltage, we used 2-stage bevel structure. Bevel angle is very important for high power devices, such as thyristor structure devices. For cathode topology, we designed 430 cathode fingers. Each finger has designed $200{\mu}m$ width and $2600{\mu}m$ length. The breakdown voltage between cathode and anode contact of this fabricated GCT device is 2,715V.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.1585-1587
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• 2004

이중 에피층 구조를 가지는 SOI(Silicon-On-Insulator) LIGBT(Lateral Insulated Gate Bipolar Transistor)의 에피층 두께 변화에 따른 항복전압 특성을 분석하였다. 제안된 소자는 전하보상효과를 얻기 위해 n/p-epi의 이중 에피층 구조를 사용하였으며, 에피층 전체에 걸쳐서 전류가 흐를 수 있도록 하기 위해 trenched anode구조를 채택하였다. 본 논문에서는 n/p-epi층의 농도를 고정시킨 후 각각의 epi층의 두께를 변화시켜가며 simulation을 수행하였을 때 항복전압의 변화 및 표면과 epi층에서의 전계분포변화를 분석하였다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.9
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• pp.1638-1642
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• 2007

This paper investigated the destruction effect of the semiconductors by impact of high power electromagnetic wave. The experiments is employed as an open-ended waveguide to study the destruction effects on semiconductor using a 2.45 GHz 600 W Magnetron as a high power electromagnetic wave. The semiconductors are located at a distance of $31cm\sim40cm$ from the open-ended waveguide and are composed of a LED drive circuit for visual discernment. Also the chip condition of semiconductor is observed by SEM(Scanning Electron Microscope) analysis. The semiconductor are damaged by high power electromagnetic wave at about 860 V/m. The SEM analysis of the destructed devices showed onchipwire and bondwire destructions. Based on the result, semiconductor devices should have plan to protect the semiconductor devices form high power electromagnetic wave. And the database from this experiment provides the basis for future investigation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.202-211
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• 2014

The bulk current injection (BCI) and direct power injection (DPI) method have been established as the standards for the electromagnetic susceptibility (EMS) test. Because the BCI test uses a probe to inject magnetically coupled electromagnetic (EM) noise, there is a significant difference between the power supplied by the radio frequency (RF) generator and that transferred to the integrated circuit (IC). Thus, the immunity estimated by the forward power cannot show the susceptibility of the IC itself. This paper derives the real injected power at the failure point of the IC using the power transfer efficiency of the BCI method. We propose and mathematically derive the power transfer efficiency based on equivalent circuit models representing the BCI test setup. The BCI test is performed on I/O buffers with and without decoupling capacitors, and their immunities are evaluated based on the traditional forward power and the real injected power proposed in this work. The real injected power shows the actual noise power level that the IC can tolerate. Using the real injected power as an indicator for the EMS test, we show that the on-chip decoupling capacitor enhances the EM noise immunity.