• Title/Summary/Keyword: Power electronic converter

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Design and Fabrication of RF-DC Converters for 5.8 GHz Microwave Wireless Power Transmission (5.8 GHz 마이크로파 무선전력전송을 위한 RF-DC 변환기의 설계 및 구현)

  • Lee, Seong Hun;Son, Myung Sik
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.4
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    • pp.84-87
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    • 2015
  • We have designed and fabricated two different RF-DC Converters called doubler for 5.8GHz Microwave Wireless Power Transmission. The doubler as RF-DC Converter makes the rectified voltage be doubled. We measured and compared voltages of the doublers with those of the previous full-wave rectifying RF-DC Converter. The doublers show rectified double voltages. However, the full-wave rectifying converter has a high efficiency due to the suppression of reflecting harmonics. The other fabricated doublers causes so many harmonics that they can't convert the low-power RF to the full DC. In this paper, we show that the different doublers doesn't double the rectifying voltages compared with those of the full-wave rectifying converter and give a reason about that.

A Single-Stage AC/DC Converter with Low Voltage Stresses and Reduced Switching Losses

  • Kim, Kyu-Tae;Choi, Woo-Young;Kwon, Jung-Min;Kwon, Bong-Hwan
    • Journal of Power Electronics
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    • v.9 no.6
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    • pp.823-834
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    • 2009
  • This paper proposes a high-efficiency single-stage ac/dc converter. The proposed converter features low voltage stresses and reduced switching losses. It operates at the boundary of discontinuous- and continuous-conduction modes by employing variable switching frequency control. The turn-on switching loss of the switch can be reduced by turning it on when the voltage across it is at a minimum. The voltage across the bulk capacitor is independent of the output loads and maintained within the practical range for the universal line input, so the problem of high voltage stress across the bulk capacitor is alleviated. Moreover, the voltage stress of the output diodes is clamped to the output voltage, and the output diodes are turned off at zero-current. Thus, the reverse-recovery related losses of the output diodes are eliminated. The operational principles and circuit analysis are presented. A prototype circuit was built and tested for a 150 W (50V/3A) output power. The experimental results verify the performance of the proposed converter.

Modeling, Simulation and Fault Diagnosis of IPFC using PEMFC for High Power Applications

  • Darly, S.S.;Vanaja Ranjan, P.;Justus Rabi, B.
    • Journal of Electrical Engineering and Technology
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    • v.8 no.4
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    • pp.760-765
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    • 2013
  • An Interline Power Flow Controller (IPFC) is a converter based controller which compensates and balance the power flow among multi-lines within the same corridor of the multi-line subsystem. The Interline Power Flow Controller consists of a voltage source converter based Flexible AC Transmission System (FACTS) controller for series compensation. The reactive voltage injected by individual Voltage Source Converter (VSC) can be controlled to regulate active power flow in the respective line in which one VSC regulates the DC voltage, the other one controls the reactive power flows in the lines by injecting series active voltage. In this paper, a circuit model for IPFC is developed and simulation of interline power flow controller is done using the proposed circuit model. Simulation is done using MATLAB Simulink and PSPICE. The results obtained by MATLAB are compared with the results obtained by PSPICE and compared with theoretical values.

Design of PWM IC with Standby Mode Control Function for SMPS (대기모드 기능을 내장한 전원 장치 제어용 PWM IC 설계)

  • Park, Hyun-Il;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Han, Seok-Bung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.4
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    • pp.289-295
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    • 2008
  • In this paper, we designed the off-line PWM(Pulse width modulation) control IC for flyback type power converter to reduce the standby power consumption. In normal state, this off-line PWM IC generates the output pulse with $40\sim60kHz$ frequency and duty ratio of $20\sim88%$. When SMPS operates in standby mode, this IC generates the output pulse with 33kHz frequency and duty ratio of 1 %. SPICE simulation was performed to verify the standby power consumption of the power converter with designed of-line PWM IC. Power converter with designed off-line PWM IC consumes less than 0.3W when it operates in standby mode condition.

Resonant Pulse Power Converter with a Self-Switching Technique

  • Kim, Hyeok-Jin;Chung, Gyo-Bum;Cho, Jae-Ho
    • Journal of Power Electronics
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    • v.10 no.6
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    • pp.784-791
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    • 2010
  • In this paper, a resonant pulse power converter (RPPC) is proposed. The proposed RPPC transfers the pulse-shape power from a DC source to a load periodically. The RPPC consists of a resonant circuit and a resonant pulse converter driven by a self-switching circuit. Depending on the magnitude difference between the input and output voltages, the operations of the RPPC are divided into 4 modes; boost mode, hybrid mode, direct mode and cut-off mode, respectively. The main switch of the RPPC turns on in the ZCS condition and off in the ZVS condition spontaneously. The operational principles of a RPPC using the self-switching technique are analyzed and verified in experiments. An example of a RPPC application is demonstrated in the area of thermoelectric energy harvesting.

Improved Single-Stage AC-DC LED-Drive Flyback Converter using the Transformer-Coupled Lossless Snubber

  • Jeong, Gang-Youl;Kwon, Su-Han
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.644-652
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    • 2016
  • This paper presents an improved single-stage ac-dc LED-drive flyback converter using the transformer-coupled lossless (TCL) snubber. The proposed converter is derived from the integration of a full-bridge diode rectifier and a conventional flyback converter with a simple TCL snubber. The TCL snubber circuit is composed of only two diodes, a capacitor, and a transformer-coupled auxiliary winding. The TCL snubber limits the surge voltage of the switch and regenerates the energy stored in the leakage inductance of the transformer. Also, the switch of the proposed converter is turned on at a minimum voltage using a formed resonant circuit. Thus, the proposed converter achieves high efficiency. The proposed converter utilizes only one general power factor correction (PFC) control IC as its controller and performs both PFC and output power regulation, simultaneously. Therefore, the proposed converter provides a simple structure and an economic implementation and achieves a high power factor without the need for any separate PFC circuit. In this paper, the operational principle of the proposed converter is explained in detail and the design guideline of the proposed converter is briefly shown. Experimental results for a 40-W prototype are shown to validate the performance of the proposed converter.

A New Power Factor Correction Circuit Using Boost Converter (부스트 컨버터를 이용한 새로운 역율 개선회로)

  • Kim, Marn-Go
    • Proceedings of the KIEE Conference
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    • 1996.07a
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    • pp.355-357
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    • 1996
  • With the wide-spread use of rectifier in electronic equipments, such problems as electronic components failures or equipment disorders have been occurred due to current harmonics. To overcome these problems, power factor correction circuits employing boost converter have been used. The switching stress of boost converter can be reduced by snubber circuit. Recently, research activities in snubber circuits have been directed to energy recovery snubber for improving the efficiency of power converter. In this study, a new passive snubber circuit which can recover trapped snubber energy without added control is proposed for boost converter The control of boost converter with proposed snubber is the same as the conventional one. In addition, the energy recovery circuit can be implemented with a few passive components. The circuit operation is confirmed through simulation.

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Simple Structure LED-Driving Power Converter with High Power Factor (높은 역률을 가지는 단순 구조 LED 구동 전력컨버터)

  • Jeong, Gang-Youl
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.767-773
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    • 2018
  • This paper proposes the simple structure LED-driving power converter with high power factor. As the proposed power converter combines the PFC boost converter and the conventional flyback converter into only one power conversion circuit, it simplifies the structure of LED-driving power converter. Thus the proposed converter is controlled using only one PWM controller IC, and it achieves high power factor, constant output voltage/current and cost-effectiveness. Therefore the proposed converter is suitable for the industry production and utilization of LED-light-system. In this paper, the operation analysis and design example of the proposed converter are explained, briefly. Also experimental results of the prototype that is implemented based on the designed circuit parameters are shown to validate operation characteristics of the proposed converter.

High Voltage Power Supply using an LLC Resonant Half bridge Converter (LLC 공진형 하프브릿지 컨버터를 이용한 고전압 전원장치)

  • Gil, Young-Man;Ga, Dong-Hoon;Ahn, Tae-Young;Choi, Eun-Sil;Lee, Jun-Hak;Lee, Hak-Soo
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.522-523
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    • 2012
  • In this paper, we present an experimental results of 15kV class high-volatge power supply using the LLC resonant half-bridge converter for CNT lamp. The resonant current of the LLC resonant half-bridge converter prototype in the steady state was stable. The output voltage of prototype converter was maintained at about 15kV in the steady state.

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Design of a Low Power 10bit Flash SAR A/D Converter (저 전력 10비트 플래시-SAR A/D 변환기 설계)

  • Lee, Gi-Yoon;Kim, Jeong-Heum;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.4
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    • pp.613-618
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    • 2015
  • This paper proposed a low power CMOS Flash-SAR A/D converter which consists of a Flash A/D converter for 2 most significant bits and a SAR A/D converter with capacitor D/A converter for 8 least significant bits. Employment of a Flash A/D converter allows the proposed circuit to enhance the conversion speed. The SAR A/D converter with capacitor D/A converter provides a low power dissipation. The proposed A/D converter consumes $136{\mu}W$ with a power supply of 1V under a $0.18{\mu}m$ CMOS process and achieves 9.16 effective number of bits for sampling frequency up to 2MHz. Therefore it results in 120fJ/step of Figure of Merit (FoM).