• Journal of Power Electronics
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• 제12권3호
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• pp.429-438
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• 2012

This paper presents the use of a novel, single-stage high-power-factor electronic ballast with a symmetrical class-DE low-$d{\upsilon}$/$dt$ resonant rectifier as a power-factor corrector for fluorescent lamps. The power-factor correction is achieved by using a bridge rectifier to utilize the function of a symmetrical class-DE resonant rectifier. By employing this topology, the peak and ripple values of the input current are reduced, allowing for a reduced filter inductor volume of the EMI filter. Since the conduction angle of the bridge rectifier diode current was increased, a low-line current harmonic and a power factor near unity can be obtained. A prototype ballast, operating at an 84-kHz fixed frequency and a 220-$V_{rms}$, 50-Hz line input voltage, was utilized to drive a T8-36W fluorescent lamp. Experimental results are presented which verify the theoretical analysis.

• Transactions on Electrical and Electronic Materials
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• 제17권2호
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• pp.79-85
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• 2016

In this study, we proposed a new single-stage small power MH lamp electronic ballast and power-factor correction circuit with improved circuit by the current of passive power factor correction. Main circuit integrates traditional DC/DC and DC/AC circuits into one-stage DC/AC inverter. Moreover, we described the working principle and control strategy of the new circuit; it's soft switching principle; and resonant element parameter design formula. An experimental prototype of HID lamp electronic ballast with output power of 70 W was built to verify the feasibility of the analysis and design. The simulation and experimental results proved that the power factor of this circuit could reach 94%, with efficiency of 90%. The input current harmonics conform to IEC 61000-3-2 standards and its cost is low. These superior performances of the new circuit indicate certain practical values.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.1401-1403
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• 2002

This paper presents the development of an electronic dash-pot(EDP) system it)r protecting the power electronic circuit. The EDP play role protecting an equipment by disconnecting between voltage source and load system. Also, converting the existed electrical system into an electronic mechanism, it can reduce the power consumption and prevents the system damage due to over current.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2013년도 춘계학술대회 논문집
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• pp.589-590
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• 2013

The fast development of electronic devices towards wireless, portable and multi-functionality desperately needs the self-powered and low maintenance power sources. The possibility to coupling the nanogenerator to wearable and portable electronic device facilitates the self powered device with independent and self sustained power source. Nanogenerator has ability to convert the low frequency mechanical vibration to electrical energy which is utilized to drive the electronic device [1]. The self powered power source has the ability to generate the power from environment and human activity has attracted much interest because of place and time independent. The human body motion based energy harvesting has created huge impact for future self powered electronics device applications. The power generated from the human body motion is enough to operate the future electronic devices. The energy harvesting from human body motion based on triboelectric effect has simple, cost-effective method [2, 3] and meet the required power density of devices. However, its output is still insufficient to driving electronic devices in continues manner so new technology and new device architecture required to meet required power. In the present work, we have fabricated the triboelectric nanogenerator using PDMS polymer. We have studied detail about the power output of the device with respect to different polymer thickness and varied separation distance.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.235-245
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• 2014

This paper presents an envelope tracking power amplifier using a standard CMOS process for the 3GPP long-term evolution transmitters. An efficiency of the CMOS power amplifier for the modulated signals can be improved using a highly efficient and wideband CMOS bias modulator. The CMOS PA is based on a two-stage differential common-source structure for high gain and large voltage swing. The bias modulator is based on a hybrid buck converter which consists of a linear stage and a switching stage. The dynamic load condition according to the envelope signal level is taken into account for the bias modulator design. By applying the bias modulator to the power amplifier, an overall efficiency of 41.7 % was achieved at an output power of 24 dBm using the 16-QAM uplink LTE signal. It is 5.3 % points higher than that of the power amplifier alone at the same output power and linearity.

• Transactions on Electrical and Electronic Materials
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• 제17권6호
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• pp.317-328
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• 2016

Over the past few decades, CMOS current comparators have been used in a wide range of applications, including analogue circuits, MVL (multiple-valued logic) circuits, and various electronic products. A current comparator is generally used in an ADC (analog-to-digital) converter of sensors and similar devices, and several techniques and approaches have been implemented to design the current comparator to improve performance. To this end, this paper presents a bibliographical survey of recently-published research on different current comparator topologies for low-power and high-speed applications. Moreover, several aspects of the CMOS current comparator are discussed regarding the design implementation, parameters, and performance comparison in terms of the power dissipation and operational speed. This review will serve as a comparative study and reference for researchers working on CMOS current comparators in low-power and high-speed applications.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.311-316
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• 2005

The power saving mechanism of IEEE 802.16e operates in two modes; awake mode and sleep mode. While the user terminal transmits and receives packets in awake mode, it sleeps for a given interval to save the power consumption in sleep mode. The IEEE 802.16e specifies that the user terminal increases the sleep interval exponentially unless it has to wake up. In this paper, we analyze the performance of IEEE 802.16e power saving mechanism by considering down link traffic conditions. With the extensive simulations, we observe the trade-off between the power saving performance and the average packet delay. In addition, we observe that various performance parameters of IEEE 802.16e power saving mechanism are affected by the traffic patterns.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.97-104
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• 2018

This paper proposes supplementary control of conventional coordinated control of a power plant which directly affects network frequency. The supplementary control with dynamic matrix control is applied for 1000 MW power plant with ultra-supercritical (USC) once-through boiler. The supplementary control signal is added to the boiler feedforward signal in the existing coordinated control logic. Therefore, it is a very practical structure that can maintain the existing multi-loop control system. This supplementary controller uses the step response model for the power plant system, and on-line optimization is performed at every sampling step. The simulation results demonstrate the effectiveness of the proposed supplementary control in a wide operating range of a practical 1000 MW USC power plant simulator. These results can contribute the stable operation of power system frequency.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권3호
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• pp.175-181
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• 2006

Wide band-gap semiconductor electron devices have made great progresses to produce very high power amplifiers for various wireless standards. The advantages of wide band-gap electronic devices and their progresses are summarized in this paper.

• 전기전자학회논문지
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• 제25권1호
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• pp.133-138
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• 2021

본 논문에서는 높은 출력 전력을 확보함과 동시에 효율을 개선시킬 수 있는 전력 증폭기 구조를 제안하였다. 전력 소모를 최소화하기 위하여 구동 증폭단은 공통-소스 구조를 적용하였으며, 높은 출력 전력 확보를 위하여 전력 증폭단은 스택 구조를 적용하였다. 제안하는 구조의 검증을 위하여 아홉 개의 금속층을 제공하는 65-nm RFCMOS 공정을 이용하여 Ku 대역 전력 증폭기를 설계하였다. 동작 주파수 14 GHz에서 16 GHz 일 때, P1dB, power-added efficiency 및 전력 이득은 각각 20 dBm 이상, 23 dB 이상 및 25% 이상으로 확인 되었다.