• 제목/요약/키워드: Power decoupling circuit

검색결과 56건 처리시간 0.023초

단상 유도전동기의 속도제어 시스템 (Speed Control System of Single Phase Induction Motor)

  • 이득기;이경주;김흥근
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제50권5호
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    • pp.229-237
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    • 2001
  • Until recent years, most of the researches for motor drives focus on the high performance drive of the three phase induction motor, and that of the single phase induction motor(SPIM) is out of interest. The SPIM is widely used at low power level because it has the simple construction and economic advantage. In general such machine has both main winding and auxiliary winding. Conventionally, these winding are fed by only one single phase source, and the speed of the motor is not controlled. The SPIM with an auxiliary winding can be treated as an asymmetrical two phase machine. In this paper the space vector Equivalent circuit of SPIM is derived. For vector control of the SPIM the stator current must be decoupled into the flux producing component and the torque producing component. To accomplish decoupling control, the conventional method requires complex calculation and large computation time. We proposed the equivalent circuit referred to the rotor side, in this case only the stator resistances in the direct axis and the quadrature axis are different each other and the other parameters are represented to be equal. Thus the decoupling of the stator current is similar to that of the three phase induction motor. In this paper, the novel vector control system of the single phase induction motor is proposed. To verify the feasibility of this scheme, simulation and experimentation are carried out. The results prove the excellent characteristics for the dynamic response, which confirms the validity of the proposed system.

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커플링/디커플링 네트워크 내장 서지발생장치의 설계 및 제작 (Design and Fabrication of a Surge Generator with Coupling/Decoupling Networks)

  • 김남훈;강태호;신한신;길경석
    • 한국전기전자재료학회논문지
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    • 제33권2호
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    • pp.130-134
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    • 2020
  • Metal oxide varistors (MOVs) protect circuits and devices from transient overvoltages in electric power systems. However, a MOV continuously deteriorates owing to manufacturing defects or repetitive protective operations from transient overvoltages. A deteriorated MOV may result in a short circuit or a line-ground accident. Previous studies focused on the analysis of deterioration mechanisms and condition diagnosis techniques for MOVs owing to their recent growth of use. An accelerated deterioration experiment under the same conditions in which a MOV operates is essential. In this study, we designed and fabricated a surge generator that can apply a surge current to a MOV connected to AC mains. The coupling network operates at a low impedance against the surge current from the surge generator and transfers the surge current to the MOV under test. It also acts as a high impedance against AC mains for the AC voltage not to be applied to the surge generator. The decoupling network operates at a high impedance against the surge current and blocks the surge current from AC mains. It also acts as a low impedance against AC mains for the AC voltage to be applied to the MOV under test. The prototype surge generator can apply the 8/20 us up to 15 kA on AC voltages in the approximate range of 110~450 V, and it fully operates on a LabVIEW-based program.

Modified Modular Multilevel Converter with Submodule Voltage Fluctuation Suppression

  • Huang, Xin;Zhang, Kai;Kan, Jingbo;Xiong, Jian
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.942-952
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    • 2017
  • Modular multilevel converters (MMCs) have been receiving extensive research interest in high/medium-voltage applications due to its modularity, scalability, reliability, high-voltage capability, and excellent harmonic performance. Submodule capacitors are usually rather bulky because they have to withstand fundamental frequency voltage fluctuations. To reduce the capacitance of these capacitors, this study proposes a modified MMC with an active power decoupling circuit within each submodule. The modified submodule contains an auxiliary half bridge, with its capacitor split in two. Also, the midpoints of the half bridge and the split capacitors are connected by an inductor. With this modified submodule, the fundamental frequency voltage fluctuation can be suppressed to a great extent. The second-order voltage fluctuation, which is the second most significant component in submodule voltage fluctuations, is removed by the proper control of the second-order circulating current. Consequently, the submodule capacitance is significantly reduced. The viability and effectiveness of the proposed new MMC are confirmed by the simulation and experimental results. The proposed MMC is best suited for medium-voltage applications where power density is given a high priority.

전력계통 전압외란에 대한 자가수용가의 과도 안정도 해석 (Transient Stability of Industrial Plant on Voltage Disturbance in the Utility System)

  • 조양행;정재길
    • 조명전기설비학회논문지
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    • 제12권3호
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    • pp.132-138
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    • 1998
  • 최근의 자가발전기를 보유한 대용량 수용가에서는 자체의 전력계통올 안정하게 유지하기 위한 명가 방법으로서 안정도 해석올 통한 계통의 문제점을 파악하는 것은 중요한 과제이다. 본 논문은 전력계통에 있어서 대전력계통(한전계통)측의 3상 단락고장시 고장 지속 시간에 따른 자가 발전을 보유한 수용가 전력계통의 전압에 미치는 영향을 조사 분석한 논문으로 한전계통측의 고장 지속 시간에 따라 수용가 계통의 발전기 및 동기기가 불안정하게 된다. 이러한 불안정현상은 후비보호 계전기(저전압 계전기)의 적절한 시간 설정으로 한전계통과 분리하고 수용가의 부하를 차단하므로써 안정도를 증진시킬 수 있다.

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A 1.8 V 40-MS/sec 10-bit 0.18-㎛ CMOS Pipelined ADC using a Bootstrapped Switch with Constant Resistance

  • Eo, Ji-Hun;Kim, Sang-Hun;Kim, Mun-Gyu;Jang, Young-Chan
    • Journal of information and communication convergence engineering
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    • 제10권1호
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    • pp.85-90
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    • 2012
  • A 40-MS/sec 10-bit pipelined analog to digital converter (ADC) with a 1.2 Vpp differential input signal is proposed. The implemented pipelined ADC consists of eight stages of 1.5 bit/stage, one stage of 2 bit/stage, a digital error correction block, band-gap reference circuit & reference driver, and clock generator. The 1.5 bit/stage consists of a sub-ADC, digital to analog (DAC), and gain stage, and the 2.0 bit/stage consists of only a 2-bit sub-ADC. A bootstrapped switch with a constant resistance is proposed to improve the linearity of the input switch. It reduces the maximum VGS variation of the conventional bootstrapped switch by 67%. The proposed bootstrapped switch is used in the first 1.5 bit/stage instead of a sample-hold amplifier (SHA). This results in the reduction of the hardware and power consumption. It also increases the input bandwidth and dynamic performance. A reference voltage for the ADC is driven by using an on-chip reference driver without an external reference. A digital error correction with a redundancy is also used to compensate for analog noise such as an input offset voltage of a comparator and a gain error of a gain stage. The proposed pipelined ADC is implemented by using a 0.18-${\mu}m$ 1- poly 5-metal CMOS process with a 1.8 V supply. The total area including a power decoupling capacitor and the power consumption are 0.95 $mm^2$ and 51.5 mW, respectively. The signal-to-noise and distortion ratio (SNDR) is 56.15 dB at the Nyquist frequency, resulting in an effective number of bits (ENOB) of 9.03 bits.

INMARSAT-B형 위성통신용 광대역 수신단 구현 및 성능평가에 관한 연구 (A Study on Implementation and Performance Evaluation of Wideband Receiver for the INMARSAT-B Satellite Communications System)

  • 전중성;임종근;김동일;김기문
    • 한국정보통신학회논문지
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    • 제5권1호
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    • pp.166-172
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    • 2001
  • 본 논문에서는 INMARSAT-B형 위성통신용 광대역 수신단을 저잡음증폭기와 고이득증폭기로 구성하였다. 저잡음증폭기의 입력단 정합회로는 저항 결합회로의 형태로 설계하였으며, 전원회로는 저잡음 특성이 우수한 자기 바이어스 회로를 사용하였다. 수신단 이득을 향상시키기 위해서 고이득증폭기는 양단 정합된 단일 증폭기 형태로 제작하였으며, 바이어스 안정화 저항을 사용하여 회로의 전압강하 및 전력손실을 가능한 줄이고 온도 안정성을 고려하여 능동 바이어스 회로를 사용하였으며, 스퓨리어스를 감쇠시키기 위해서 저잡음증폭기와 고이득증폭기사이에 대역통과 필터를 사용하였다. 1525~1575 MHz 대역에서 60 dB 이상의 이득, 1.8:1 이하의 입.출력 정재파비를 나타내었으며, 특히 1537.5 MHz에서 입력신호의 크기가 -126.7 dBm일 때1.02 kHz 떨어진 점에서의 C/N비가 45.23 dB/hz의 측정결과를 나타냄으로써 설계시 목표로 했던 사양을 모두 만족시켰다.

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