• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.5
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• pp.760-768
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• 2016

Recently, as one of the policies for carbon free operation method of independent power system replacing diesel generator with renewable energy such as wind power and photovoltaic(PV) system has been presented. Therefore, this paper proposes an operation algorithm and modeling of independent power system by considering CVCF(constant voltage constant frequency) ESS(energy storage system) for constant frequency and voltage, LC(load control) ESS for demand and supply balancing and SVC(static var compensator) for reactive power compensation. From the simulation results based on the various operation scenario, it is confirmed that proposed operation algorithm and modeling may contribute stable operation and carbon free in independent power system.

• Journal of Power Electronics
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• v.16 no.3
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• pp.849-860
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• 2016

The high-switching-frequency operation of power converters can achieve high power density through size reduction of passive components, such as capacitors, inductors, and transformers. However, a small-output capacitor that has small capacitance and low effective series resistance changes the small-signal model of the converter power stage. Such a capacitor can make the converter unstable by increasing the crossover frequency in the transfer function of the small-signal model. In this paper, the design and implementation of a high-frequency LLC resonant converter are presented to verify the power density enhancement achieved by decreasing the size of passive components. The effect of small output capacitance is analyzed for stability by using a proper small-signal model of the LLC resonant converter. Finally, proper design methods of a feedback compensator are proposed to obtain a sufficient phase margin in the Bode plot of the loop gain of the converter for stable operation at 500 kHz switching frequency. A theoretical approach using MATLAB, a simulation approach using PSIM, and experimental results are presented to show the validity of the proposed analysis and design methods with 100 and 500 kHz prototype converters.

• Journal of the Korean Institute of Intelligent Systems
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• v.20 no.2
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• pp.220-225
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• 2010

This paper deals with the robust stability analysis of STATCOM (Static Synchronous Compensator) power system for power quality enhancement and power system stability. The STATCOM plays an important role in controlling the reactive power flow to the power network and hence the system voltage fluctuations and stability. The control areas of this plant are very large and the overall composition of the system is nonlinear. Also, STATCOM is influence of the uncertainties so that it is necessary to apply the new control technique. For solving these problems, we perform the fuzzy modeling and robust analysis for STATCOM system.

• Journal of Power Electronics
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• v.15 no.4
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• pp.994-1005
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• 2015

This paper presents a novel power control strategy for PWM current-source rectifiers (CSRs) in the stationary frame based on the instantaneous power theory. In the proposed control strategy, a virtual resistance based on the capacitor voltage feedback is used to realize the active damping. In addition, the proportional resonant (PR) controller under the two-phase stationary coordinate is designed to track the ac reference current and to avoid the strong coupling brought about by the coordinate transformation. The limitations on improving steady-state performance of the PR controller is investigated and mitigated using a cascaded lead-lag compensator. In the z-domain, a straightforward procedure is developed to analyze and design the control-loop with the help of MATLAB/SISO software tools. In addition, robustness against parameter variations is analyzed. Finally, simulation and experimental results verify the proposed control scheme and design method.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.3
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• pp.319-325
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• 2004

FHMA(frequency hopping multiple access) communication system has good performance for the LPI and AJ(low probability of intercept and anti-jamming) application. However, high PAPR(peak to average power ratio) happens in the base-station or the repeater system because of a large number of users. In general, predistorter is used to complete the HPA(high power amplifier) nonlinear characteristics. This paper analyzes BER performance when magnitude of IBO(input back oft) and the number of user are considered as the system parameters. In case of the SSPA(solid state power amplifier), the predistorter does not always work as a complete nonlinear compensator. We find that there is a minimum value of IBO for the predistorter to compensate for the nonlinear SSP A, which is changed as the number of user. If IBO is lower than 6 ㏈ at the user number of 16 and p=1, the system with predistorter is poorer than the one without predistorter. Only when the IBO is over 6 ㏈, predistorter does work as a nonlinear compensator. We call it as cross-over IBO value. TWTA improves the more compensation performance than SSPA because characteristic AM/AM of TWTA has more nonlinear than SSPA. At the BER=10$\^$-3/, there are SNR power gains of about 2.5 ㏈ and 3 ㏈ due to the predistorter when the numbers of users are 16 and 32, respectively.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.11-19
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit which becomes more serious problem due to the thin gate oxide and small threshold voltage in nanometer CMOS technology and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9V power supply voltage. The simulation results show that the proposed PLL achieves a 88% jitter reduction at 440MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of $40M{\sim}725MHz$ with a multiplication range of 11023, and the RMS and peak-to-peak jitter are 5ps and 42.7ps, respectively.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.249-250
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• 2008

본 논문은 고창 전력품질 실증시험장에서 실 계통 연계를 위해 시험 중인 1.5M급 풍력발전 시뮬레이터의 선로정수를 PSCAD/EMTDC를 이용하여 모의하고 선로정수에 따른 풍력발전시스템이 계통에 미치는 영향을 분석하는데 중점을 두었다. 현재 고창에 설치되어있는 전력품질 실증시험장은 22.9kV 급전선에 SSTS(Synchronous Static Transfer Switch)의 한쪽 스위치로 직접 연결되어있으며 다른 한 쪽은 전력계통에서 발생되는 다양한 형태의 이벤트를 발생시키는 SSHG(Sag Swell Harmonics Generator)를 통하여 연결되어있다. 전력품질 향상기기중 하나인 DVR(Dynamic Voltage Restorer)는 SSTS의 부하쪽으로 직렬로 연결되어있으며 delta-wye 변압기를 통해 정류기 부하와 APF(Active Power Filter), 그리고 순저항부하와 유도성부하가 연결되어 있고 또한 SSHG를 통하여 연결된 배전선에는 DSTATCOM(Distribution Static Compensator)가 병렬로 연결되어있다. 본 논문에서는 고창에 있는 풍력발전 시뮬레이터와 동일하게 PSCAD/EMTDC로 구성하였으며 선로정수를 모델링 하기 위해 선로모델을 10Km, 20Km, 30Km, 40Km,로 설정하여 선로정수에 따른 계통영향을 분석하여 풍력발전 시뮬레이터에서 모의가능 한 선로정수 값을 제시한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.4
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• pp.321-329
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• 2015

The static synchronous compensator (STATCOM) of cascaded H-bridge configuration accompanying multiple separate DC sides is inherently subject to the problem of uneven DC voltages. These DC voltages in one leg can be controlled by adjusting the AC-side output voltage of each cell inverter, which is proportional to the active power. However, when the phase current is extremely small, large AC-side voltage is required to generate the active power to balance the cell voltages. In this study, an alternative zero-sequence current injection method is proposed, which facilitates effective cell balancing controllers at no load, and has no effect on the power grid because the injected zero sequence current only flows within the STATCOM delta circuit. The performance of the proposed method is verified through simulation and experiments.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.1
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• pp.102-107
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• 2005

This paper describes a new voltage sag-swell generator for the test of custom power devices such as UPS, DVR, DSTATCOM, SSTS, etc. Voltage sag, swell, outage, and unbalance generation mechanism and the operating principle are described for the proposed scheme. The usefulness of the scheme is proved through simulations and experiments. The proposed scheme has good features of simple structure, high reliability, wide range of sag and swell variation, and easy control. Especially, the scheme can provide a cost-effective implementation of a power quality disturbance generator. Therefore, it is expected that the scheme will contribute to the self implementation of the system with low cost in laboratory.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.398-401
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• 2011

This paper presents a high-efficiency CMOS PWM DC-DC buck converter. It generates a constant output voltage(1-2.8V), from an input voltage(3.4-3.9V). Inductor-based type is chosen and inductor current is controlled with PWM operation. The designed circuit consists of power switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator and Modulator. Switching Frequency is 1MHz, It operates in CCM when the load current is more than 40mA, and the maximum efficiency is 98.71% at 100mA. Output voltage ripple is 0.98mV(input voltage:3.5V, output voltage:2.5V). The performance of the designed circuit has been verified through extensive simulation using a CMOS $0.18{\mu}m$ technology.