• Title/Summary/Keyword: Power circuit design

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The Design of CMOS-based High Speed-Low Power BiCMOS LVDS Transmitter (CMOS공정 기반의 고속-저 전압 BiCMOS LVDS 구동기 설계)

  • Koo, Yong-Seo;Lee, Jae-Hyun
    • Journal of IKEEE
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    • v.11 no.1 s.20
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    • pp.69-76
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    • 2007
  • This paper presents the design of LVDS (Low-Voltage-Differential-Signaling) transmitter for Gb/s-per-pin operation. The proposed LVDS transmitter is designed using BiCMOS technology, which can be compatible with CMOS technology. To reduce chip area and enhance the robustness of LVDS transmitter, the MOS switches of transmitter are replaced with lateral bipolar transistor. The common emitter current gain($\beta$) of designed bipolar transistor is 20 and the cell size of LVDS transmitter is $0.01mm^2$. Also the proposed LVDS driver is operated at 1.8V and the maximum data rate is 2.8Gb/s approximately In addition, a novel ESD protection circuit is designed to protect the ESD phenomenon. This structure has low latch-up phenomenon by using turn on/off character of P-channel MOSFET and low triggering voltage by N-channel MOSFET in the SCR structure. The triggering voltage and holding voltage are simulated to 2.2V, 1.1V respectively.

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Design and implementation of Serial Communication for IoT Sensing Technology (IoT의 센싱 기술을 위한 직렬통신 설계 및 구현)

  • Park, Sangbong;Jeong, Daeseung
    • The Journal of the Convergence on Culture Technology
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    • v.3 no.3
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    • pp.27-30
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    • 2017
  • IoT could be applied to various areas because of the important role of sensor. The existing sensor communication method is to quickly transmit data by using clock and two data pins based on the I2C serial communication method. As the objects used are gradually light-weighted and the amount of data transmission is decreased, the simplification of hardware is more emphasized as an essential design element than the speed of transmission. This paper designed a circuit to send/receive data in series, and also realized arduino, by analyzing the existing communication method and then using a single pin for light-weight. The single pin serial communication could reduce power consumption, which is suitable for the sensor area using digital communication of IoT area.

10 GHz TSPC(True Single Phase Clocking) Divider Design (10 GHz 단일 위상 분주 방식 주파수 분배기 설계)

  • Kim Ji-Hoon;Choi Woo-Yeol;Kwon Young-Woo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.8 s.111
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    • pp.732-738
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    • 2006
  • Divide-by-2 and divide-by-4 circuits which can operate up to 10 GHz are designed. A design method used in these circuits is the TSPC(True Single Phase Clocking) topology. The structure of the TSPC dividers is very simple because they need only a single clock and purely consist of smalt sized cmos devices. Through measurements, we find the fact that in proportion to the bias voltage, the free running frequency increases and the operation region also moves toward a higher frequency region. For operating conditions of bias voltage $3.0{\sim}4.0V$, input power 16dBm and dcoffset $1.5{\sim}2.0V$, 5 GHz and 2.5 GHz output signals divided by 2 and 4 are measured. The layout size of the divide-by-2 circuit is about $500{\times}500 um^2$($50{\times}40um^2$ except pad interconnection part).

An 2.4 GHz Bio-Radar System for Non-Contact Measurement of Heart and Respiration (호흡 및 심박수 측정을 위한 비 접촉 방식의 2.4 GHz 바이오 레이더 시스템)

  • Lee, Yong-Jin;Jang, Byung-Jun;Yook, Jong-Gwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.2
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    • pp.191-199
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    • 2008
  • In this paper, we present a performance analysis and design and implementation results of a 2.4 GHz bio-radar system that can detect human heartbeat and respiration signals. In order to design a 2.4 GHz bio-radar system qualitatively, we investigate the electromagnetic properties of human tissues and calculate the target SNR of demodulation output with respect to distance. The target SNR is defined by the 90 % success ratio for detecting heartbeat signal. With this target SNR value, the performance and link budget of the bio-radar system is simulated using MATLAB. Using this link budget results, the direct conversion receiver is designed and Implemented in 4 layer printed circuit board(PCB). With output power of 0 dBm and 5 Hz bandwidth, 80 % success ratio of 50 cm is measured. Measurement results show a good agreement with simulation results.

Design of Matching Layers for high Efficiency-wide band Ultrasonic Transducers (고출력 광대역 초음파 탐촉자를 위한 정합층 설계)

  • Kim, Yeon-Bo;Roh, Yong-Ae
    • The Journal of the Acoustical Society of Korea
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    • v.15 no.5
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    • pp.82-89
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    • 1996
  • Application fields of ultrasonic transducers can be divided into two categories, a high ultrasonic resolution required field and a high ultrasonic power required field. This paper is aimed to determine the optimal properties of the matching layers of the transducer for each of the applications. Further, it is aimed to optimize the properties of the matching layers that show satisfactory performances for both of the application fields. Through the direct time domain analysis of the transmission and reflection behavior of the ultrasonic wave, apart from the conventional equivalent circuit analysis, and Fourier transformation of its results, we found the optimum acoustic impedances of the matching layers. The newly determined layers provide much better transducer performance-57% at most-than those obtained with conventional design methods. Based on the results, we also found the optimal acoustic impedances of the layers good for both of the application fields. For te optimization, we developed a new transducer performance evaluation parameter that can be applied to any type of ultrasonic transducers.

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Design of Second-order BPS Systems for the Cancellation of Multiple Aliasing (다중 aliasing 소거를 위한 2차 BPS 시스템의 설계)

  • Baek, Jein
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.3
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    • pp.162-170
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    • 2015
  • In the bandpass sampling (BPS), the sampling frequency is lower than the frequency of the signal to be sampled. In this method, the baseband spectrum can be directly obtained by the sampling operation. This makes the frequency down converter unnecessary as well as the receiver's circuit simpler. In the second-order BPS system, two sampling devices are used. When aliasing occurs due to the sampling operation, the aliased component can be cancelled by combining the two sampled signals. In this paper, it is presented a design method of the second-order BPS system when multiple interferences are simultaneously aliased to the signal component. The optimum phase of the interpolant filter is searched for maximizing the signal-to-interference ratio, and a practical formula for the suboptimal phase is derived in terms of the power spectrum profile of the BPS input. A computer simulation has been performed for the proposed second-order BPS system, and it has been shown that the signal-to-interference ratio can be increased by considering multiple aliasing.

Design of Broadband Hybrid Mixer using Dual-Gate FET (이중게이트 FET를 이용한 광대역 하이브리드 믹서 설계)

  • Jin, Zhe-Jun;Lee, Kang-Ho;Koo, Kyung-Heon
    • Journal of Advanced Navigation Technology
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    • v.9 no.2
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    • pp.103-109
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    • 2005
  • This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation with RF and LO signal of better than 40 dBc from 1.5 GHz to 5.5 GHz. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation region. The input matching circuit has been designed to have conversion gain from 1.5 GHz to 5.5 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 1.5 GHz to 5.5 GHz at the low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

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Strategic design for oxide-based anode materials and the dependence of their electrochemical properties on morphology and architecture

  • Gang, Yong-Muk
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2012.05a
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    • pp.73-73
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    • 2012
  • Modern technology-driven society largely relies on hybrid electric vehicles or electric vehicles for eco-friendly transportation and the use of high technology devices. Lithium rechargeable batteries are the most promising power sources because of its high energy density but still have a challenge. Graphite is the most widely used anode material in the field of lithium rechargeable batteries due to its many advantages such as good cyclic performances, and high charge/discharge efficiency in the initial cycle. However, it has an important safety issue associated with the dendritic lithium growth on the anode surface at high charging current because the conventional graphite approaches almost 0 V vs $Li/Li^+$ at the end of lithium insertion. Therefore, a fundamental solution is to use an electrochemical redox couple with higher equilibrium potentials, which suppresses lithium metal formation on the anode surface. Among the candidates, $Li_4Ti_5O_{12}$ is a very interesting intercalation compound with safe operation, high rate capability, no volume change, and excellent cycleability. But the insulating character of $Li_4Ti_5O_{12}$ has raised concerns about its electrochemical performance. The initial insulating character associated with Ti4+ in $Li_4Ti_5O_{12}$ limits the electronic transfer between particles and to the external circuit, thereby worsening its high rate performance. In order to overcome these weak points, several alternative synthetic methods are highly required. Hence, in this presentation, novel ways using a synergetic strategy based on 1D architecture and surface coating will be introduced to enhance the kinetic property of Ti-based electrode. In addition, first-principle calculation will prove its significance to design Ti-based electrode for the most optimized electrochemical performance.

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Design of Phase Locking Loopfilter Using Sampling Phase Detector for Ku-Band Dielectric Resonator Oscillator (Ku-대역 유전체 공진기 발진기의 Sampling Phase Detector를 이용한 위상 고정 루프 필터 설계 및 제작)

  • Badamgarav, O.;Yang, Seong-Sik;Oh, Hyun-Seok;Lee, Man-Hee;Jeong, Hae-Chang;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.10
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    • pp.1147-1158
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    • 2008
  • In this paper, we designed a phase-looking circuit that locks the 16.8 GHz VTDRO to a 700 MHz SAW oscillator using SPD as a phase detector Direct phase locking with loop filter alone causes the problem of lock time, so VTDRO is phase leered by loop filter with the aid of time varying square wave current generator. The current generator is related to the loop filter and needs the systematic toning. In this paper, a systematic design of the current generator and loop filter is presented. The fabricated PLDRO shows a stabilized frequency of 16.8 GHz, a output power 6.3 dBm, and a phase noise of -101 dBc/Hz at the 100 kHz offset.

Thermal Characteristics Investigation of 6U CubeSat's Deployable Solar Panel Employing Thermal Gap Pad (열전도 패드가 적용된 6U 큐브위성용 태양전지판의 열적 특성 분석)

  • Kim, Hye-In;Kim, Hong-Rae;Oh, Hyun-Ung
    • Journal of Aerospace System Engineering
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    • v.14 no.3
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    • pp.51-59
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    • 2020
  • In the case of cubesat, a PCB-based deployable solar panel advantageous in terms of weight reduction and electrical circuit design is widely used considering the limited weight and volume of satellites. However, because of the low thermal conductivity of PCB, there is a limit relative to heat dissipation. In this paper, the thermal gap pad is applied to the contact between the PCB-based solar panel and the aluminum stiffener mounted on the outside of the panel. Thus, the heat transfer from the solar cell to the rear side of the panel is facilitated. It maximizes the heat dissipation performance while maintaining the merits of PCB panel, and thus, it is possible to improve the power generation efficiency from reducing the temperature of the solar cell. The effectiveness of the thermal design of the 6U cubesat's deployable solar panel using the thermal gap pad has been verified through on-orbit thermal analysis based on the results, compared with the conventional PCB-based solar panel.