• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.2
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• pp.29-35
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• 1998

This paper describes architectures and design of a SIMD type parallel image processing chip called SliM-II. The chiphas a linear array of 64 processing elements (PEs), operates at 30 MHz in the worst case simulation and gives at least 1.92 GIPS. In contrast to existing array processors, such as IMAP, MGAP-2, VIP, etc., each PE has a multiplier that is quite effective for convolution, template matching, etc. The instruction set can execute an ALU operation, data I/O, and inter-PE communication simulataneously in a single instruction cycle. In addition, during the ALU/multiplier operation, SliM-II provides parallel move between the register file and on-chip memory as in DSP chips, SliM-II can greatly reduce the inter-PE communication overhead, due to the idea a sliding, which is a technique of overlapping inter-PE communication with computation. Moreover, the bandwidth of data I/O and inter-PE communication increases due to bit-parallel data paths. We used the COMPASS$^{TM}$ 3.3 V 0.6.$\mu$m standrd cell library (v8r4.10). The total number of transistors is about 1.5 muillions, the core size is 13.2 * 13.0 mm$^{2}$ and the package type is 208 pin PQ2 (Power Quad 2). The performance evaluation shows that, compared to a existing array processors, a proposed architeture gives a significant improvement for algorithms requiring multiplications.s.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.2
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• pp.43-48
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• 2001

Economical consumption of energy, longer life of lamps, higher lighting comfort and new aesthetic of illumination is subject of numerous research and development works. The halogen lamps are an example of positive solution some of above mentioned problems. The electronic transformers are more frequent used for their supply. In comparison with conventional transformers they have less weight, less volume and 60% less power losses. Their advantages are particular visible, when the hybrid technique is applied. The paper presents the results of engineering research and development works carried out in Private Institute of Electronic Engineering, in R. & D. Center for Hybrid Microelectronics and Resistors and in Technical School of Communications in Krakow, in the field of the design and exploitation tests of hybrid converters 220V AC /12V DC (electronic transformers) and electronic ballasts destined for the supply of halogen lamps 20W to 150W and fluorescent lamps respectively. To perform the converters, thick film technology and surface mount technology were used. For the protection of converter electronic circuit the thick film temperature sensor and transistors were applied. Moreover the paper presents the base application circuits of elaborated converters, their technical parameters and exploitation results. The development perspectives of such domain of hybrid circuits are also discussed.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1062-1065
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• 2002

We demonstrate the MMIC(monolithic microwave integrated circuit) frequency doublers generating stable and low-cost 29 ㎓ local oscillator signals from 14.5 ㎓ input signals. These devices were designed and fabricated by using the MMIC integration process of 0.1 $\mu\textrm{m}$ gate-length PHEMTs (pseudomorphic high electron mobility transistors). The measurements showed S$\_$11/ of -9.2 dB at 14.5 ㎓, S/sub22/ of -18.6 dB at 29 ㎓ and a minimum conversion loss of 18.2 dB at 14.5 ㎓ with an input power of 6 dBm. The fundamental signal of 14.5㎓ was suppressed below 15.2 dBc compared with the second harmonic signal at the output port, and the isolation characteristics of the fundamental signal between the input and the output port were maintained above 30 dB in the frequency range of 10.5 ㎓ to 18.5 ㎓.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.305-308
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• 2002

An 1.8V 6bit IGSPS ADC for high speed data acquisition is discussed in this paper. This ADC is based on a flash ADC architecture because the flash ADC is the only practical architecture at conversion rates of IGSPS and beyond. A straightforward 6bit full flash A/D converter consists of two resistive ladders with 63 laps, 63 comparators and digital blocks. One important source of errors in flash A/D converter is caused by the capacitive feedthrough of the high frequency input signal to the resistive reference-lauder. Consequently. the voltage at each tap of the ladder network can change its nominal DC value. This means large transistors have a large parasitic capacitance. Therefore, a dual resistive ladder with capacitor is employed to fix the DC value. Each resistive ladder generates 32 clean reference voltages which alternates with each other. And a two-stage amplifier is also used to reduce the effect of the capacitive feedthrough by minimizing the size of MOS connected to reference voltage. The proposed ADC is based on 0.18${\mu}{\textrm}{m}$ 1-poly 6-metal n-well CMOS technology, and it consumes 307㎽ at 1.8V power supply.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.1
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• pp.51-56
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• 1999

This paper presents a new transient overvoltage blocking device (TOBD) for info-communication facilities with low power and high frequency bandwidth. Conventional protection devices have some problems such as low frequency bandwidth, low energy capacity and high remnant voltage. In order to improve these limitations, thehybrid type TOBD, which consists of a gas tube, avalanche diodes and junction typefield effect transistors (JFETs), was designed and fabricated. The TOBD differs from the conventional protection devices in configuration, and JFETs were used as an active non-linear element and a high speed switching diode with low capacitance limits high current. Therefore the avalanche dilde with low energy capacity are protected fromthe high current, and the TOBD has a very small input capacitance. From the performance test using combination surge generator, which can produce $1.2/50\mus\;4.2kV_{max}\; 8/20\mus\; 2.1kA_{max}$, it is confirmed that proposed TOBD has an excellent protection performance in tight clamping voltage and limiting current characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12S
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• pp.1175-1180
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• 2003

Transformer Coupled Plasma Chemical Vapor Deposited (TCP-CVD) silicon nitride (SiNx) is widely used as a gate dielectric material for thin film transistors (TFT). This paper reports the SiNx films, grown by TCP-CVD at the low temperature (30$0^{\circ}C$). Experimental investigations were carried out for the optimization o(SiNx film as a function of $N_2$/SiH$_4$ flow ratio varying ,3 to 50 keeping rf power of 200 W, This paper presents the dielectric studies of SiNx gate in terms of deposition rate, hydrogen content, etch rate and leakage current density characteristics lot the thin film transistor applications. And also, this work investigated means to decrease the leakage current of SiNx film by employing $N_2$ plasma treatment. The insulator layers were prepared by two step process; the $N_2$ plasma treatment and then PECVD SiNx deposition with SiH$_4$, $N_2$gases.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.433-433
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• 2013

Graphene, $sp^2$-hybridized 2-Dimension carbon material, has drawn enormous attention due to its desirable performance of excellent properties. Graphene can be applied for many electronic devices such as field-effect transistors (FETs), touch screen, solar cells. Furthermore, indium tin oxide (ITO) is commercially used and sets the standard for transparent electrode. However, ITO has certain limitations, such as increasing cost due to indium scarcity, instability in acid and basic environments, high surface roughness and brittle. Due to those reasons, graphene will be a perfect substitute as a transparent electrode. We report the graphene synthesized by inductive coupled plasma enhanced chemical vapor deposition (ICP-PECVD) process on Cu substrate. The growth was carried out using low temperature at $400^{\circ}C$ rather than typical chemical vapor deposition (CVD) process at $1,000^{\circ}C$ The low-temperature process has advantage of low cost and also low melting point materials will be available to synthesize graphene as substrate, but the drawback is low quality. To improve the quality, the factor affect the quality of graphene was be investigated by changing the plasma power, the flow rate of precursors, the scenario of precursors. Then, graphene film's quality was investigated with Raman spectroscopy and sheet resistance and optical emission spectroscopy.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.04a
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• pp.57-65
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• 2001

Economical consumption of energy, longer life of lamps, higher lighting comfort and new aesthetic of illumination is subject of numerous research and development works. The halogen lamps are an example of positive solution some of above mentioned problems. The electronic transformers are more frequent used for their supply. In comparison with conventional transformers they have less weight, less volume and 60% less power tosses. Their advantages are particular visible, when the hybrid technique is applied. The paper presents the results of engineering research and development works carried out ill Private Institute of Electronic Engineering, in R. & D. Center for Hybrid Microelectronics and Resistors and in Technical School of Communications in Krakow, in the field of the design and exploitation tests of hybrid converters 220V AC /12V DC (electronic transformers) and electronic ballasts destined for the supply of halogen lamps 20W to 150W and fluorescent lamps respectively. To perform the converters, thick film technology and surface mount technology were used. For the protection of converter electronic circuit the thick film temperature sensor and transistors were applied. Moreover the paper presents the base application circuits of elaborated converters, their technical parameters and exploitation results. The development perspectives of hybrid domain of hybrid circuits are also discussed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.383-390
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• 2014

This paper presents an excitatory CMOS neuron oscillator circuit design, which can synchronize two neuron-bursting patterns. The excitatory CMOS neuron oscillator is composed of CMOS neurons and CMOS excitatory synapses. And the neurons and synapses are connected into a close loop. The CMOS neuron is based on the Hindmarsh-Rose (HR) neuron model and excitatory synapse is based on the chemical synapse model. In order to fabricate using a 0.18 um CMOS standard process technology with 1.8V compatible transistors, both time and amplitude scaling of HR neuron model is adopted. This full-chip integration minimizes the power consumption and circuit size, which is ideal for motion control unit of the proposed bio-mimetic micro-robot. The experimental results demonstrate that the proposed excitatory CMOS neuron oscillator performs the expected waveforms with scaled time and amplitude. The active silicon area of the fabricated chip is $1.1mm^2$ including I/O pads.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.25-28
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• 1999

Metal ferroelectric semiconductor Field Effect- Transistors(MFSFET) with various gate electrodes, that are aluminum, platinum and poly -Si, using LiNbO$_3$/Si(100) structures were fabricated and the properties of the FETs have been discussed. The drain current of the state of FET with Pt electrode was more than 3 orders of magnitude larger than the state current at the same gate voltage of 1.5 V, 7.rich means the memory operation of the MFSFET. A write voltage as low as about $\pm$4 V, which is applicable to low power integrated circuits, was used for polarization reversal. The retention properties of the FET using Al electrode were quite good up to about 10$^3$s and using Pt electrode remained almost the same value of its initial value over 2 days at room temperature.