• 제목/요약/키워드: Power Factor Corrected

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단상 SRM 구동을 위한 1단 방식 역률보상형 컨버터 개발 (Development of Single-stage Power Factor Corrected Converter for Single-Phase SRM Drive)

  • 빈재구;이정한;조승현;박성준;김철우
    • 전력전자학회논문지
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    • 제8권6호
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    • pp.519-526
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    • 2003
  • 본 논문은 단상 SRM 구동을 위한 1단 방식의 역률 보상형 컨버터에 관한 연구이다. 기존의 SRM 구동에서의 역률 보상회로는 2단 방식의 구조로 구성이 복잡하고 소자의 수가 증가하여 경제적으로 불리한 단점을 가진다. 따라서, 부가적인 회로의 추가 없이 1단 방식의 단위 역률이 가능한 단상 SRM 구동회로를 제안한다. 제안된 회로에 대한 타당성을 시뮬레이션과 실험으로 검증한다.

단상 SRM 구동을 위한 1단 방식 역률보상형 컨버터 (Single-Stage Power Factor Corrected Converter for SRM Drive)

  • 이정한;박성준;박한웅;김철우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2002년도 전력전자학술대회 논문집
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    • pp.502-505
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    • 2002
  • A singl-phase power factor corrected converter for switched reluctance motor driving is presented to achieve sinusoidal, near unity power factor input currents. Because it combines a power factor corrected converter and a conventional asymmetric SRM driver Into one power stage, the configuration has a simple structure resulted in low cost. A prototype to drive 6/6 poles SRM employing a parking magnet is designed to evaluate the proposed topology The characteristics and operational mode will be discussed in depth, and the validity of proposed driver will be verified through the experimental results.

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단상 SRM 구동을 위한 저가형 PFC 컨버터 (Single-Phase SRM Power Factor Corrected Converter for Cost Saving)

  • 이정한;박성준;박한웅;김철우
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계합동학술대회 논문집
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    • pp.62-67
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    • 2002
  • A single-phase power factor corrected converter for switched reluctance motor driving is presented to achieve sinusoidal, near unity power factor input currents. Because it combines a power factor corrected converter and a conventional asymmetric SRM driver into one power stage, the configuration has a simple structure resulted in low cost. A prototype to drive 6/6 poles SRM employing a parking magnet is designed to evaluate the proposed topology. The characteristics and operational mode will be discussed in depth, and the validity of proposed driver will be verified through the experimental results.

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90-260Vrms 입력 범위를 갖는 단일 전력단 고역률 컨버터 (Single-Stage High Power Factor Converter for 90-260Vrms Input)

  • 김학원;문건우;조관열;윤명중
    • 전력전자학회논문지
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    • 제7권1호
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    • pp.18-29
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    • 2002
  • 기존의 역률 개선 컨버터는 경 부하에서 높은 직류 링크 전압을 갖는다. 특히 라인 전압이 높고 부하가 작을 경우, 직류 링크 전압은 매우 높은 전압을 갖게 되어 실용상 문제가 존재한다. 본 논문에서 역률 개선 부로 벅 토폴로지를 갖는 새로운 단일 전력 단 역률 개선 컨버터를 제안하였다. 또한 제안된 컨버터의 타당성을 증명하기 위해 제안된 회로의 설계 예를 보였으며, 설계 시 고려되어야 할 사항들과 관련 설계 식을 유도하였다. 유도된 설계 식으로부터 정해진 회로 정수 값을 이용하여 실험을 실시하였고, IEC1000-3-2의 역률 규제를 만족함을 입증하였다. 본 논문에서 제안된 컨버터를 통하여 기존의 단일 전력 단 컨버터의 문제점인 경 부하 시 높은 직류 링크 전압 문제를 해결할 수 있었다.

능동 클램프 모드로 동작하는 단일 전력 AC/DC 컨버터에 의한 역률개선 (Power Factor with Single Power Stage AC/DC Converter Operated in Active-Clamp Mode)

  • 윤신용;백수현;김용;김철진;어창진
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제50권8호
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    • pp.392-401
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    • 2001
  • This paper presents the single-stage high power factor AC to DC converter operated in active-clamp mode. The proposed converter is added active-clamping circuit to boost-flyback single-stage power factor corrected power supply. The active-clamping circuit limits voltage spikes, recycles the energy trapped in the leakage inductance, and provides a mechanism for achieving soft switching of the electronic switches to reduce the switching loss. The auxiliary switch of active-clamping circuit uses the same control and driver circuit as the main switch to reduce the additional cost and size. To verify the performance of the proposed converter, a 100W converter has been designed. The proposed converter gives good power factor correction, low line current harmonic distortions, and tight output voltage regulation, as used unity power factor.

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PDP TV의 sustain/reset 구동전원 공급을 위한 1단방식의 역률보상형 AC-to-DC 컨버터 (Single-stage Power Factor Corrected AC-to-DC Converter for sustain/reset Driving Power Supply of PDP TV)

  • 강필순;박진현
    • 한국정보통신학회논문지
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    • 제12권2호
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    • pp.282-289
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    • 2008
  • PDP TV의 전력 효율을 향상시키기 위해서는 PDP의 구동과정에서 발생하게 되는 불필요한 전력소모와 AC 입력으로부터 원하는 DC를 얻기 위한 과정 중에 발생하는 전력 소모를 최소화하여야 한다. 일반적인 PDP 구동을 위한 입력 전원단은 2단 구조의 역률 보상형 컨버터를 채용하고 있으며, PDP 구동시 전력소모가 가장 큰 서스테인 드라이버와 리셋 회로의 구동전원을 공급하기 위한 별도의 DC-to-DC 컨버터를 필요로 한다. 그러나 이러한 회로의 구현은 저가의 PDP를 요구하는 시장 상황에 유연하게 대처하는데 많은 어려움을 준다. 따라서 본 논문에서는 최소의 전력 변환단계를 가지도록 서스테인과 리셋 회로의 전원 공급이 가능한 1단방식의 역률보상형 AC-to-DC 컨버터를 제안한다. 제안하는 시스템은 1단방식의 입력전원부 구성을 통해 전력 변환단을 최소화하여 전력 변환 중에 발생하는 손실을 최소화하며, PDP 서스테인/리셋 드라이버의 구동전압을 직접 공급하는 형태로 구성하여 시스템 부피의 감소, 원가 절감을 이룰 수 있다.

Analysis, Design, Modeling, Simulation and Development of Single-Switch AC-DC Converters for Power Factor and Efficiency Improvement

  • Singh, Bhim;Chaturvedi, Ganesh Dutt
    • Journal of Power Electronics
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    • 제8권1호
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    • pp.51-59
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    • 2008
  • This paper addresses several issues concerning the analysis, design, modeling, simulation and development of single-phase, single-switch, power factor corrected AC-DC high frequency switching converter topologies with transformer isolation. A detailed analysis and design is presented for single-switch topologies, namely forward buck, flyback, Cuk, Sepic and Zeta buck-boost converters, with high frequency isolation for discontinuous conduction modes (DCM) of operation. With an awareness of modem design trends towards improved performance, these switching converters are designed for low power rating and low output voltage, typically 20.25W with 13.5V in DCM operation. Laboratory prototypes of the proposed single-switch converters in DCM operation are developed and test results are presented to validate the proposed design and developed model of the system.

Analysis, Design, and Implementation of a Single-Phase Power-Factor Corrected AC-DC Zeta Converter with High Frequency Isolation

  • Singh, Bhim;Agrawal, Mahima;Dwivedi, Sanjeet
    • Journal of Electrical Engineering and Technology
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    • 제3권2호
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    • pp.243-253
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    • 2008
  • This paper deals with the analysis, design, and implementation of a single phase AC-DC Zeta converter with high frequency transformer isolation and power factor correction(PFC) in two modes of operation, discontinuous current mode of operation(DCM), and continuous current mode of operation(CCM). A Digital Signal Processor(DSP) based implementation is carried out for validation of the Zeta converter developed design in discontinuous mode of operation. A comparison of both modes of operation is presented for a 1kW power rating from the point of view of steady state and dynamic behavior, power quality, simplicity, control technique, device rating, and converter size. The experimental results of a developed prototype of Zeta converter are presented for validation of the developed design. It is observed that CCM is most suitable for higher power applications where it requires some complex control and sensing of the additional variables.

고역율형 단상 SRM의 토크리플 저감을 위한 구동회로 설계 (Torque Ripple Reduction Driver of Single Pulse SRM for High Power Factor)

  • 김봉철;이동희;안진우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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    • pp.308-311
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    • 2004
  • A novel single-stage power factor corrected (PFC) drive for switched reluctance motor (SRM) is presented to achieve sinusoidal, near unity power factor input current. The proposed PFC SRM drive has no additional active switch. And a single-stage approach, which combines a DC link capacitor used as do source and a drive used for driving the motor into one power stage, has a simple structure and low cost. The characteristics and validity of the proposed circuit will be discussed in depth through the experimental results.

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단상 SRM의 역률 개선을 위한 구동방식 (Single-Phase SRM Driving Method for Power Factor Correction)

  • 안진우;박성준;손익진;오석규;황영문
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.235-238
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    • 2001
  • A novel single-stage power factor corrected (PFC) drive for switched reluctance motor (SRM) is presented to achieve sinusoidal, near unity power factor input current. The proposed PFC SRM drive has no additional active switch. And a single-stage approach, which combines a DC link capacitor used as dc source and a drive used for driving the motor into one power stage, has a simple structure and low cost. The characteristics and validity of the proposed circuit will be discussed in depth through the experimental results.

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