• 제어로봇시스템학회:학술대회논문집
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• 1987.10b
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• pp.631-636
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• 1987

The design of ultrasonic transducer energy processing systems requires highly reliable command featuring mechanical frequency tracking and constant velocity control of the ultrasonic transducer with an acoustic load. This paper presents a new conceptional instantaneous current resultant control base high-frequency inverter using self turn-off devices driving an electrostrictive ultrasonic transducer system and its optimum control technique, which is implemented by feed-back of the ultrasonic transducer applied voltage and instantaneous velocity of the transducer vibrating system through a Phase-Locked-Loop control scheme. The feedback voltage corresponding to instantaneous velocity is averaged over a half-period with respect to constant amplitude/constant velocity control strategy. Described are the theory of this signal detection technique and the experimental set-up.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.1
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• pp.53-76
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• 2020

The synchronous phasor measurement algorithm is the core content of the phasor measurement unit. This manuscript proposes a dynamic synchronous phasor measurement algorithm based on compressed sensing theory. First, a dynamic signal model based on the Taylor series was established. The dynamic power signal was preprocessed using a least mean square error adaptive filter to eliminate interference from noise and harmonic components. A Chirplet overcomplete dictionary was then designed to realize a sparse representation. A reduction of the signal dimension was next achieved using a Gaussian observation matrix. Finally, the improved orthogonal matching pursuit algorithm was used to realize the sparse decomposition of the signal to be detected, the amplitude and phase of the original power signal were estimated according to the best matching atomic parameters, and the total vector error index was used for an error evaluation. Chroma 61511 was used for the output of various signals, the simulation results of which show that the proposed algorithm cannot only effectively filter out interference signals, it also achieves a better dynamic response performance and stability compared with a traditional DFT algorithm and the improved DFT synchronous phasor measurement algorithm, and the phasor measurement accuracy of the signal is greatly improved. In practical applications, the hardware costs of the system can be further reduced.

• Journal of Power Electronics
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• v.8 no.1
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• pp.91-100
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• 2008

The d-q harmonic detecting algorithms are dominant methods to generate current references for active power filters (APF). They are often implemented in the synchronous frame and time domain. This paper researches the frequency characteristics of d-q synchronous transformations, which are closely related to the analysis and design issues of control system. Intuitively, the synchronous transformation is explained with amplitude modulation (AM) in this paper. Then, the synchronous filter is proven to be a time-invariant and linear system, and its transfer function matrix is derived in the stationary frames. These frequency-domain models imply that the synchronous transformation has an equivalent effect of frequency transformation. It is because of this feature, the d-q method achieves band-pass characteristics with the low pass filters in the synchronous frame at run time. To simplify these analytical models, an instantaneous positive-negative sequence frame is proposed as expansion of traditional symmetrical components theory. Furthermore, the synchronous filter is compared with the traditional bind-pass filters based on these frequency-domain analytical models. The d-q harmonic detection methods are also improved to eliminate the inherent coupling effect of synchronous transformation. Typical examples are given to verify previous analysis and comparison. Simulation and experimental results are also provided for verification.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.1
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• pp.1-10
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• 2010

This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to $V_{dd}$. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 MHz. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.

• Journal of Power Electronics
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• v.5 no.4
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• pp.305-311
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• 2005

Throughout the world, studies on the water energization are currently under way. Of those, Brown gas, which is generated through the electrolyzation of water and is a mixed gas of the constant volume of 2 parts hydrogen to 1 part oxygen, has better characteristics in terms of economy, energy efficiency, and environmental affinity than those of acetylene gas and LPG (Liquefied Petroleum Gas) used for existing welding machines. This paper analyzes the characteristics of Brown gas and presents methods for increasing the generating efficiency of Brown gas by designing a power supply to deliver power to a water-electrolytic cell and designing a cylindrical electrode to improve the efficiency of the electrolyzer needed for water electrolyzation. Based on the above the methods, a welding machine using Brown gas is developed. And the generation efficiency of Brown gas is measured tinder different conditions (duty ratio, frequency and amplitude) of supplied power.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1830-1843
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• 2018

In this paper, the generation of a reference current and voltage signal based on a Kalman filter is offered for a 3-phase 4wire UPQC (Unified Power Quality Conditioner). The performance of the UPQC is improved with source voltages that are distorted due to harmonic components. Despite harmonic and frequency variations, the Kalman filter is capable enough to determine the amplitude and the phase angle of load currents and source voltages. The calculation of the first state is sufficient to identify the fundamental components of the current, voltage and angle. Therefore, the Kalman state estimator is fast and simple. A Kalman based control strategy is proposed and implemented for a UPQC in a distribution system. The performance of the proposed control strategy is assessed for all possible source conditions with varying nonlinear and linear loads. The functioning of the proposed control algorithm with a UPQC is scrutinized and validated through simulations employing MATLAB/Simulink software. Using a FPGA SPATRAN 3A DSP board, the proposed algorithm is developed and implemented. A small-scale laboratory prototype is built to verify the simulation results. The stated control scheme for the UPQC reduces the following issues, voltage sags, voltage swells, harmonic distortions (voltage and current), unbalanced supply voltage and unbalanced power factor under dynamic and steady-state operating conditions.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.1 s.104
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• pp.67-73
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• 2006

This paper proposes a new predistortion linearizer with controlling intermodulation distortion(IMD) signals. This linearizer achieves independent control of third- and fifth-order intermodulation distortion products using amplitude modulation with even harmonic signals. A vector modulator that modulate fundamental signal with both second- and fourth-order harmonic components generated by harmonic generator circuits, generates the inverse characteristics third-and fifth-order intermodulation signals of power amplifier and controls amplitude and phase of them with each other modulation factors. As a results, this linearizer is suppressed IMD signals of power amplifier effectively. The test results show that the third IMD is cancelled more than 25 dB and the fifth order IMD is cancelled about 18 dB for CW two-tone signals. Also, it's improved the adjacent channel power ratio(ACPR) more than 7 dB for IS-95 CDMA signals.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.8
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• pp.1188-1195
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• 2022

The 6-port phase correlator consists of one in-phase power divider and three 3-dB 90-degree phase difference power dividers, and is mainly used in a demodulation circuit that determines the phase of an input signal. This paper proposes the wideband 6-port phase correlator that consists of an in-phase power divider using a wideband 2:1 impedance transformer with three 37.5-Ω coaxial cables, and a 3-dB 90-degree phase difference power divide using Wireline. The proposed wideband phase correlator fabricated at a center frequency of 1000MHz has the value of the input reflection coefficient(S₁₁ and S₂₂) -14dB or less in the frequency range of 640~1270MHz. Also, the signal transmission characteristic(S_i1), from the in-phase power divider input port to four output ports, has the amplitude of -6.5±0.6dB and the phase error of within ±3.4°, and the signal transmission characteristic(S_i2), from the 90 degree phase difference power divider input port to four output ports, has the amplitude of -6.1±0.6dB and the phase error of within ±6.2°.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.4
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• pp.705-715
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• 2007

Recently, the interest on power quality has been hot issue because the equipments cause voltage disturbance and have become more sensitive to the voltage disturbance. Additionally, the reseach on power electronic equipments applying to the high power has been increased. This paper deals with Line-Interactive Dynamic Voltage Restorer(LIDVR) system using 7-Level H-Bridge inverter, which is one of the solutions to compensate the voltage disturbance and to increase the power of equipments. The LIDVR has the following advantages comparing to the DVR with the series injection transformer. It has the power factor near to unity under the condition of normal source voltage, can compensate the harmonic current of the load and the instant interruption, and has the fast response. First, the construction, the operation mode and algebraic modeling of LIDVR are reviewed. And then the voltage control algorithm is proposed to get the sinusoidal load voltage with constant amplitude. Finally, simulation and experiment results verify the proposed LIDVR system.

• Journal of Power Electronics
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• v.9 no.3
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• pp.507-515
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• 2009

This paper proposes an autonomous decentralized control for a parallel connected uninterruptible power supply (UPS) system based on a fast power detection method using a FPGA based hardware controller for a single phase system. Each UPS unit detects only its output voltage and current without communications signal exchange and a quasi dq transformation method is applied to detect the phase and amplitude of the output voltage and the output current for the single phase system. Fast power detection can be achieved based on a quasi dq transformation, which results in a realization of very fast transient response under rapid load change. In the proposed method, the entire control system is implemented in one FPGA chip. Complicated calculations are assigned to hardware calculation logic, and the parallel processing circuit makes it possible to realize minimized calculation time. Also, an Nios II CPU core is implemented in the same FPGA chip, and the software can be applied for non-time critical calculations. Applying this control system, an autonomous decentralized UPS system with very fast transient response is realized. Feasibility and stable operation are confirmed by means of an experimental setup with three UPSs connected in parallel. Also, rapid load change is applied and excellent performance of the system is confirmed in terms of transient response and stability.