• Journal of the Korean institute of surface engineering
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• v.41 no.2
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• pp.48-50
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• 2008

Solid phase crystallization (SPC) of amorphous silicon is usually conducted at around $600^{\circ}C$ since it is used in the application of flat panel display using thermally susceptible glass substrate. In this study we conducted SPC experiments at temperatures higher than $600^{\circ}C$ using silicon wafers. Crystallization rate becomes dramatically rapid at higher temperatures since SPC kinetics is controlled by nucleation with high value of activation energy. We report SPC kinetics of high temperatures compared to that of low temperatures.