• The Korean Journal of Ceramics
• /
• 제6권2호
• /
• pp.138-142
• /
• 2000

Thin film $LiNbO_3$MFS (metal-ferroelectric-semiconductor) capacitor showed improved characteristics such as low interface trap density, low interaction with Si substrate, and large remanent polarization. This paper reports ferroelectric $LiNbO_3$thin films grown directly on p-type Si (100) substrates by 13.56 MHz RF magnetron sputtering system for FRAM (ferroelectric random access memory) applications. RTA (rapid thermal anneal) treatment was performed for as-deposited films in an oxygen atmosphere at $600^{\circ}C$ for 60sec. We learned from X-ray diffraction that the RTA treated films were changed from amorphous to poly-crystalline $LiNbO_3$which exhibited (012), (015), (022), and (023) plane. Low temperature film growth and post RTA treatments improved the leakage current of $LiNbO_3$films while keeping other properties almost as same as high substrate temperature grown samples. The leakage current density of $LiNbO_3$films decreased from $10^{-5}$ to $10^{-7}$A/$\textrm{cm}^2$ after RTA treatment. Breakdown electric field of the films exhibited higher than 500 kV/cm. C-V curves showed the clockwise hysteresis which represents ferroelectric switching characteristics. Calculated dielectric constant of thin film $LiNbO_3$illustrated as high as 27.9. From ferroelectric measurement, the remanent polarization and coercive field were achieved as 1.37 $\muC/\textrm{cm}^2$ and 170 kV/cm, respectively.

• 한국재료학회지
• /
• 제3권1호
• /
• pp.19-27
• /
• 1993

RF magnetrom sputtering으로 52/48 PZT target을 사용하여 PZT thin film을 증착시킨후, furnace annealing을 실시하여 Si 기판에서는 55$0^{\circ}C$에서부터 안정상인 peroskite구조가 형성되었다. Si기판위에서는 후속열처리시 계면에 상당한 산화막층이 형성되었으며 TiN 기판위에서는 후속열처리시 TiN층은 사라지고 Ti$O_2$층이 형성되었다. Si$O_2$기판에서는 후속열처리후에도 안정한 PZT film을 형성시킬 수 있었다. As-depo.시에는 PZT film의 조성비가 균일하게 유지되었으나 75$0^{\circ}C$후속열 처리시에는 상당량의 Pb가 Si기판으로 diffusion하였으며 Si도 out-diffusion하였다. 전기적 특성은 10KHz에서 C-V를 측정결과 약 1300정도의유전상수 값이 나왔으나 후속열처리시 표면에 crack이 발생하였다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
• /
• pp.79-79
• /
• 2008

We report the growth of $Ba_{0.5}Sr_{0.5}TiO_3$(BST) thin films and their substrate-dependent electrical characteristics. BST thin films were deposited on alumina(non-single crystal), $Al_2O_3$(100) substrates by Nd:YAG Pulsed Laser Deposition(PLD) with a 355nm wavelength at substrate temperature of $700^{\circ}C$ and post-deposition annealing at $750^{\circ}C$ in flowing $O_2$ atmosphere for 1hours. BST materials had been chosen due to high dielectric permittivity and tunability for high frequency applications, To analyze the oxygen partial pressure effects, deposited films at 1, 10, 50, 100, 150, 200, 300 mTorr. The effects of oxygen pressure on structural properties of the deposited films have been investigated by X-ray diffraction(XRD) and atomic force microscope(AFM), respectively. Then we manufactured a inter-digital capacitor(IDC) patterns twenty fingers and $10{\mu}m$ gap, $700{\mu}m$ length and electrical properties were characterized. The results provide a basis for understanding the growth mechanisms and basic structural and electrical properties of BST thin films as required for tunable microwave devices applications such as varactors and tunable filters.

• 공업화학
• /
• 제10권6호
• /
• pp.814-821
• /
• 1999

고비표면적의 활성탄소섬유(ACF: activated carbon fiber)를 분극성 전극으로 이용한 전기이중층 캐패시터(electric double layer capacitor)의 단위 cell test를 통하여, ACF의 비표면적, 세공의 크기 및 전기전도도가 캐패시터의 비축전용량에 커다란 영향을 미치고 있음을 확인할 수 있었고, 전해질은 $H^+$ 이온을 함유한 $H_2SO_4$이 가장 좋은 축전용량을 나타내었으나, 집전체 부식 등의 문제로 인하여, 실용화에 있어서는 우수한 충방전 거동을 나타낸 KOH계 전해질이 적당한 것으로 확인되었다. 분극성 전극으로 사용되는 ACF를 탄화 또는 후활성화 등이 후처리를 통하여 비축전용량을 급격히 증가시킬수 있었고, 3만회까지의 연속 충방전 실험에서 전기이중층 캐패시터는 2차전지에서는 찾아 볼 수 없는 매우 높은 충방전 효율과 긴 사용수명을 가지는 것을 확인할 수 있었다.

• 대한전자공학회논문지SD
• /
• 제47권5호
• /
• pp.100-105
• /
• 2010

3GPP LTE (3rd Generation Partner Project Long Term Evolution)에 적용할 수 있는 다중대역 저잡음 증폭기를 90 nm RF CMOS 공정을 이용하여 설계하였다. 설계된 다중대역 저잡음 증폭기는 1.85-2.8 GHz 주파수 범위내의 8개 대역으로 분리돼서 동작하며, 다중대역에서의 성능 최적화를 위해 증폭기 입력단에 다중 캐패시터 어레이를 이용하여 대역에 따른 조정이 되도록 하였다. 입력 신호의 변화에 따른 증폭기의 포화를 방지하기 위해 Current Steering을 이용한 바이패스 모드를 구현하였다. 설계된 저잡음 증폭기는 1.2 V의 공급 전원에서 17 mA를 소모한다. RF 성능은 PLS (Post Layout Simulation)을 통해 검증하였다. 정상상태에서 전력이득은 26 dB, 바이패스모드에서의 전력이득은 0 또는 -6.7 dB를 얻었다. 또한, 잡음지수는 1.78dB, IIP3는 최대 이득 일 때 -12.8 dBm을 가진다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2009년도 하계학술대회 논문집
• /
• pp.179-179
• /
• 2009

This is for the electrical characterization by IDC pattern using BST$(Ba_{0.5}Sr_{0.5}TiO_3)$ thin film. BST materials had been chosen for high frequency applications due to it's high permitivity and tunability. The BST thin films have been deposited on $Al_2O_3$ Substrates by Nd-YAG pulsed laser deposition with a 355nm wavelength at $700\;^{\circ}C$. The post deposition annealing at $750^{\circ}C$ in flowing $O_2$ atmosphere for 1 hours. The capacitance of IDC patterns have been measured from 1 to 10 GHz as a function of electric field ($\pm40$ KV/cm) at room temperature using inter-digital Au electrodes deposited on top of BST. The IDC patterns have three type of fingers number. For the 10 pairs finger was the best capacitance onto $Al_2O_3$ substrate. The capacitance was 0.9pF. Also Dielectric constant was been 351 at 100 mTorr and annealing temperature $750^{\circ}C$ for 1 hour. The loss tangent was been 0.00531.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
• /
• pp.192-193
• /
• 2006

A 16Mb ITIC FeRAM device was fabricated with BLT capacitors. The average value of the switchable 2 polarization obtained m the 32k-array (unit capacitor size: 068 ${mu}m^2$) capacitors was about 16 ${\mu}C/cm^2$ at 3V and the uniformity within an 8-inch wafer was about 2.8%. But a lot of cells were failed randomly during the measuring the bit-line signal of each cell. It was revealed that the Grain size and orientation of the BLT thin film were severely non-uniform. Therefore, the uniformity of the grain size and orientation was improved by changing the process conditions of post heat treatment. The temperature of nucleation step was the very effective on varying the microstructure of the BLT thin film. The optimized temperature of the nucleation step was $560^{\circ}C$.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
• /
• pp.200-200
• /
• 2008

This paper reports on electrical characterization by IDC pattern using BST$(Ba_{0.5}Sr_{0.5}TiO_3)$ thin film. BST thin films have been deposited on $Al_2O_3$ Substrates by Nd-YAG pulsed laser deposition with a 355nm wavelength at $700^{\circ}C$. The post deposition annealing at $750^{\circ}C$ in flowing $O_2$ atmosphere for I hours. The capacitance of IDC patterns have been measured from 1 to 10 GHz as a function fo electric field (${\pm}40$ KV/cm) at room temperature using interdiigitated Au electrodes deposited on top of BST. The IDC patterns have three type of fingers number. For the finger paris was increased onto $Al_2O_3$, the capacitance increased. The capacitance of 5 pairs finger was 0.3pF and 10 pairs finger was 0.9pF.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
• /
• pp.87-89
• /
• 2005

$Bi_{3.25}Y_{0.75}Ti_{3}O_{12}$[BYT] ferroelectric thin films were deposited by RF-Sputtering method on the $Pt/Ti/SiO_2/Si$. We investigated the effects of processing condition (especially post-annealing) on the structural and ferroelectric properties of the BYT thin films. Increasing the annealing temperature, the peak intensity of (117) increased and c-axis orientation decreased. The BYT thin films crystallized well at $600^{\circ}C$ for 30min. No secondary phases observed in the XRD pattern. At annealing temperature of $700^{\circ}C$, the thin films had no cracks and the grain was uniform. The calculated lattice constants of BYT thin films were a=0.539nm, b=0.536nm, c=3.288nm. The remnant polarization of the $Bi_{3.25}Y_{0.75}Ti_{3}O_{12}$ capacitor reached $1.8uC/cm^2$ at an applied field about 400kV/cm. The BYT thin films can be used as capacitors in Ferroelectric Random Access Memory device.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.388-388
• /
• 2012

In this letter, We have investigated cell characteristics of the alloy FePt-NDs charge trapping memory capacitors with high-k $Al_2O_3$ dielectrics as a blocking oxide. The capacitance versus voltage (C-V) curves obtained from a representative MOS capacitor embedded with FePt-NDs synthesized by the post deposition annealing (PDA) treatment process exhibit the window of flat-band voltage shift, which indicates the presence of charge storages in the FePt-NDs. It is shown that NDs memory with high-k $Al_2O_3$ as a blocking oxide has performance in large memory window and low leakage current when the diameter of ND is below 2 nm. Moreover, high-k $Al_2O_3$ as a blocking oxide increases the electric field across the tunnel oxide, while reducing the electric field across the blocking layer. From this result, this device can achieve lower P/E voltage and lower leakage current. As a result, a FePt-NDs device with high-k $Al_2O_3$ as a blocking oxide obtained a~7V reduction in the programming voltages with 7.8 V memory.