• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.113-113
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• 2008

Cu CMP (Chemical Mechanical Planarization) has been used to remove copper film and obtain a planar surface which is essential for the semiconductor devices. Generally, it is known that chemical reaction is a dominant factor in Cu CMP comparing to Silicon dioxide CMP. Therefore, Cu CMP slurry has been regarded as an important factor in the entire process. This investigation focused on understanding the effect of corrosion inhibitor on copper surface and CMP results. Benzotriazole (BTA) was used as a corrosion inhibitor in this experiment. For the surface analysis, electrochemical characteristics of Cu was measured by a potentiostat and surface modification was investigated by X-ray photoelectron spectroscopy (XPS). As a result, corrosion potential (Ecorr) increased and nitrogen concentration ratio on the copper surface also increased with BTA concentration. These results indicate that BTA prevents Cu surface from corrosion and forms Cu-BTA layer on Cu surface. CMP results are also well matched with these results. Material removal rate (MRR) decreased with BTA concentration and static etch rate also showed same trend. Consequently, adjustment of BTA concentration can give us control of step height variation and furthermore, this can be applicable for Cu pattern CMP.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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• pp.33-36
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• 2003

Tungsten is widely used as a plug for the multi-level interconnection structures. However, due to the poor adhesive properties of tungsten (W) on $SiO_2$ layer, the Ti/TiN barrier layer is usually deposited onto $SiO_2$ for increasing adhesion ability with W film. Generally, for the W-CMP (chemical mechanical polishing) process, the passivation layer on the tungsten surface during CMP plays an important role. In this paper, the effect of oxidants controlling the polishing selectivity of W/Ti/TiN layer were investigated. The alumina $(Al_2O_3)$ abrasive containing slurry with 5 % $H_2O_2$ as the oxidizer, was studied. As our preliminary experimental results, very low removal rates were observed for the case of no-oxidant slurry. This low removal rate is only due to the mechanical abrasive force. However, for Ti and TiN with 5 % $H_2O_2$ oxidizer, different removal rate was observed. The removal mechanism of Ti during CMP is mainly due to mechanical abrasive, whereas for TiN, it is due to the formation of metastable soluble peroxide complex.

• Industrial Engineering and Management Systems
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• 제4권1호
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• pp.54-67
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• 2005

This paper provides an evaluation of an optimization-based, multiple-input double-output (MIDO) run-to-run (R2R) control scheme for general semiconductor manufacturing processes. The controller in this research, termed adaptive dual response optimizing controller (ADROC), can serve as a process optimizer as well as a recipe regulator between consecutive runs of wafer fabrication. In evaluation, it is assumed that the equipment model could be appropriately described by a pair of second-order polynomial functions in terms of a set of controllable variables. Of practical relevance is to consider a drifting effect in the equipment model since in common semiconductor practice the process tends to drift due to machine aging and tool wearing. We select a typical application of R2R control to chemical mechanical planarization (CMP) in semiconductor manufacturing in this evaluation, and there are five different CMP process scenarios demonstrated, including mean shift, variance increase, and IMA disturbances. For the controller, ADROC, an on-line estimation technique is implemented in a self-tuning (ST) control manner for the adaptation purpose. Subsequently, an ad hoc global optimization algorithm based on the dual response approach, arising from the response surface methodology (RSM) literature, is used to seek the optimum recipe within the acceptability region for the execution of next run. The main components of ADROC are described and its control performance is assessed. It reveals from the evaluation that ADROC can provide excellent control actions for the MIDO R2R situations even though the process exhibits complicated, nonlinear interaction effects between control variables, and the drifting disturbances.

• 한국의상디자인학회지
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• 제25권1호
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• pp.15-31
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• 2023

This study aimed to propose a fashion design development method using the external and internal characteristics of the flower and bird paintings in traditional Korean folk paintings. As a research method, external and internal characteristics of folk paintings were examined through previous studies and literature research, and folk painting patterns were developed into digital textile designs. Five 3D digital fashion designs were proposed using the CLO 3D program. The external characteristics of folk paintings were as follows: simplification and planarization of object representation, diversification of viewpoints, ignorance of perspective and symmetrical enumeration, strong colors and contrast effects, and the simultaneous representation of time. The internal characteristics of folk paintings were as follows: symbolic meaning, the beauty of free humor, modest aesthetics, complexity of reality and fantasy, and desire of shamanism. The results are as follows. Firstly, the flower and bird painting was a decorative painting style that emphasized decorative beauty and was suitable for developing fashion designs with Korean originality because of the symbolic and internal meanings. Simple layouts and bold free-spirited representations were effective ways to fill the screen with objects and gave the pattern a decorative effect. Secondly, developing a virtual clothing prototype based on digital design method using the external and internal characteristics of folk paintings and producing realistic fashion designs suggest the integrated use of science and technology, embodying modern fashion through the combination of digital fashion content and traditional cultural content. Thirdly, as a result of the development of 3D digital fashion designs, an eco-friendly and sustainable fashion design methods with virtual clothing can suggest a design development method that saves time and cost in the fashion design process while considering the environment.

• Korean Chemical Engineering Research
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• 제45권2호
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• pp.149-154
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• 2007

나노임프린트 공정기술은 나노구조물이 패턴된 스템프(혹은 몰드)를 이용하여 적절한 기판 위에 나노구조물을 복제하여 패턴을 전사하는 기술이다. 효과적인 나노임프린트 공정을 위해서는 몰드의 이형처리뿐 아니라 반대쪽의 기질과 레지스트 사이에 접착력 증가(adhesion promoter) 처리가 매우 중요한 역할을 한다. 본 연구에서는 자기조립 실란커플링제의 기상증착을 이용하여 나노임프린트 공정에서 사용되는 접착 증가막 및 표면처리 방법을 비교 분석 하였다. 이를 위해서 평탄화층(DUV-30J), 산소 플라즈마 처리, 실란커플링제 자기조립막이 비교되었다. 실란커플링제 자기조립막이 형성된 실리콘 표면은 전체적으로 나노 두께의 균일한 막이 형성되며 임프린트시 구조물들을 정밀하게 전사하였으며 3-acryloxypropyl methyl dichlorosilane(APMDS)을 이용한 자기조립막(SAMs) 처리가 평탄화층과 산소 플라즈마 처리보다 강한 접착력을 가지고 있어 나노임프린트 공정에 적합함을 알 수 있었다.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2018년도 춘계학술대회 논문집
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• pp.140-140
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• 2018

The 3D interconnect technologies have been appeared, as the density of Integrated Circuit (IC) devices increases. Through Silicon Via (TSV) process is an important technology in the 3D interconnect technologies. And the process is used to form a vertically electrical connection through silicon dies. This TSV process has some advantages that short length of interconnection, high interconnection density, low electrical resistance, and low power consumption. Because of these advantages, TSVs could improve the device performance higher. The fabrication process of TSV has several steps such as TSV etching, insulator deposition, seed layer deposition, metallization, planarization, and assembly. Among them, TSV metallization (i.e. TSV filling) was core process in the fabrication process of TSV because TSV metallization determines the performance and reliability of the TSV interconnect. TSVs were commonly filled with metals by using the simple electrochemical deposition method. However, since the aspect ratio of TSVs was become a higher, it was easy to occur voids and copper filling of TSVs became more difficult. Using some additives like an accelerator, suppressor and leveler for the void-free filling of TSVs, deposition rate of bottom could be fast whereas deposition of side walls could be inhibited. The suppressor was adsorbed surface of via easily because of its higher molecular weight than the accelerator. However, for high aspect ratio TSV fillers, the growth of the top of via can be accelerated because the suppressor is replaced by an accelerator. The substitution of the accelerator and the suppressor caused the side wall growth and defect generation. The suppressor was used as Single additive electrodeposition of TSV to overcome the constraints. At the electrochemical deposition of high aspect ratio of TSVs, the suppressor as single additive could effectively suppress the growth of the top surface and the void-free bottom-up filling became possible. Generally, copper was used to fill TSVs since its low resistivity could reduce the RC delay of the interconnection. However, because of the large Coefficients of Thermal Expansion (CTE) mismatch between silicon and copper, stress was induced to the silicon around the TSVs at the annealing process. The Keep Out Zone (KOZ), the stressed area in the silicon, could affect carrier mobility and could cause degradation of the device performance. Cobalt can be used as an alternative material because the CTE of cobalt was lower than that of copper. Therefore, using cobalt could reduce KOZ and improve device performance. In this study, high-aspect ratio TSVs were filled with cobalt using the electrochemical deposition. And the filling performance was enhanced by using the suppressor as single additive. Electrochemical analysis explains the effect of suppressor in the cobalt filling bath and the effect of filling behavior at condition such as current type was investigated.

• Korean Chemical Engineering Research
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• 제51권5호
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• pp.622-627
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• 2013

콜로이달 실리카는 실리콘과 사파이어 웨이퍼의 정밀연마슬러리, 유-무기 하이브리드 코팅제, 정밀주조의 바인더 등 다양한 제품으로 사용되는 물질이다. 이러한 실리카 졸의 입자크기 및 분산 안정성은 웨이퍼의 표면, 코팅 막 혹은 벌크의 기계적, 화학적, 광학적 특성에 영향을 주기 때문에 정확한 측정값이 요구된다. 본 연구에서는 제조사에서 제시한 입자 크기 및 표면 특성이 다른 8종류 실리카 졸의 부피 분율에 따라 입자 크기, 졸 점도 및 입자 전기영동이동도의 측정결과에 미치는 영향을 논의하였다. 높은 표면활성을 지닌 실리카 입자의 특성 및 실리카 졸의 희석에 의한 안정화 이온 농도의 변화로 인해 실리카의 측정 입자 크기와 이동도는 졸의 부피 분율 혹은 입자 크기에 따라 변한다. 60 nm 보다 작은 입자는 부피 분율이 증가함에 따라 측정된 입자 크기가 증가한 반면에, 그 보다 큰 입자에서는 측정된 입자 크기가 감소하였다. 12 nm와 같이 작은 입자는 부피 분율이 증가함에 따라 점도가 상승하면서 측정 입자의 이동도가 감소한 반면에 100 nm의 큰 입자는 0.048의 낮은 부피 분율까지 이동도가 증가하다가 그보다 높은 부피 분율부터 감소하였다.

• Korean Chemical Engineering Research
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• 제53권4호
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• pp.517-523
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• 2015

금속 배선형성 재료가 구리로 대체됨에 따라 다마신(damascene) 공정이 도입되었고, 과증착된 구리를 화학적 기계적 평탄화(Chemical Mechanical Polishing, CMP) 방식을 통해 제거하는 구리 화학적 기계적 평탄화 공정이 필요하게 되었다. 본 연구에서는 중성영역 구리 화학적 기계적 평탄화 공정용 슬러리의 구성 요소 중 하나인 부식 방지제에 아미노기($-NH_2$)와 카르복실기(-COOH)를 부착시켜 그에 따른 영향성을 확인하고자 하였다. 1H-1,2,4-트리아졸(1H-1,2,4-triazole)을 기준 부식방지제로 선정하여 식각속도, 제거속도 및 화학적 식각력을 측정한 결과 아미노기는 높은 구리 식각 능력을 보여주는 반면, 카르복실기는 부식방지제 효과가 증대되어 기본 부식방지제보다 낮은 식각 능력을 보여주었다. 이는 높은 제거속도가 필요한 1차 구리 화학적 기계적 평탄화 공정에는 아미노기가, 높은 구리 제거속도/식각속도 비를 필요로 하는 2차 구리 화학적 기계적 평탄화 공정에는 카르복실기가 적합하다는 결론을 보여준다.