• Title/Summary/Keyword: Planar Substrate

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Near IR Luminescence Properties of Er-doped Sol-Gel Films (Er이 도핑된 졸-겔 코팅막의 발광특성)

  • Lim, Mi-Ae;Seok, Sang-Il;Kim, Ju-Hyeun;Ahn, Bok-Yeop;Kwon, Jeong-Oh
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2003.11a
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    • pp.136-136
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    • 2003
  • In fiber optic networks, system size and cost can be significantly reduced by development of optical components through planar optical waveguides. One important step to realize the compact optical devices is to develop planar optical amplifier to compensate the losses in splitter or other components. Planar amplifier provides optical gain in devices less than tens of centimeters long, as opposed to fiber amplifiers with lengths of typically tens of meters. To achieve the same amount of gain between the planar and fiber optical amplifier, much higher Er doping levels responsible for the gain than in the fiber amplifier are required due to the reduced path length. These doping must be done without the loss of homogeniety to minimize Er ion-ion interactions which reduce gain by co-operative upconversion. Sol-gel process has become a feasible method to allow the incorporation of Er ion concentrations higher than conventional glass melting methods. In this work, Er-doped $SiO_2$-A1$_2$ $O_3$ films were prepared by two different method via sol -Eel process. Tetraethylorthosilicate(TEOS)/aluminum secondary butoxide [Al (OC$_4$ $H_{9}$)$_3$], methacryloxypropylcnethoxysaane(MPTS)/aluminum secondary butofde [Al(OC$_4$ $H_{9}$)$_3$] systems were used as starting materials for hosting Er ions. Er-doped $SiO_2$-A1$_2$ $O_3$ films obtahed after heat-treating, coatings on Si substrate were characterized by X-ray din action, FT-IR, and N-IR fluorescence spectroscopy. The luminescence properties for two different processing procedure will be compared and discussed from peak intensity and life time.

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Design of Planar Dipole Pair Antenna for Indoor Digital TV Reception (실내 디지털 TV 수신용 평면 다이폴 쌍 안테나 설계)

  • Lee, Jong-Ig;Yeo, Junho;Han, Dae-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.11
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    • pp.2600-2606
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    • 2014
  • In this paper, a design method for a planar dipole pair antenna for an operation in the frequency band of 470-806 MHz for terrestrial indoor digital TV (DTV) is studied. The proposed antenna is composed of two planar dipoles connected through conducting strips, and the antenna is fed by a microstrip line. By employing different lengths of dipoles, a broadband characteristics is obtained, and the antenna is size-reduced by bending both ends of the longer dipole. The effects of design parameters on the antenna performance are examined by simulation, and the parameters are adjusted for terrestrial DTV band use. A prototype of the antenna for indoor DTV reception is fabricated on an FR4 substrate with a size of $240mm{\times}139.5mm$ and tested experimentally. The experiment results show that the frequency band for a VSWR < 2 ranges 458-864 MHz(61.4%), and it corresponds fairly well with the simulated band of 448-868 MHz(63.8%).

Fabrication of Laser Diodes using Beam-Lead and its thermal characteristics (Beam-Lead를 이용한 Laser Diode의 제작과 열저항 특성)

  • 조성대
    • Proceedings of the Optical Society of Korea Conference
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    • 1990.02a
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    • pp.69-72
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    • 1990
  • For the effective heat transfering in Lser Diodes, Beam-Lead structure were introduced which is applicable to hybrid Optoelectronic Integrated Circuits. A 5-layer planar structure Laser Diode is fabricated and Beam-Lead is made by Au plating. And carrier was made by etching Si substrate and LD was mounted on a carrier. The thermal resistance was measured and we could certain that Beam-Lead structure behaves well as a heat sink.

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Breakdown Voltage Improvement in SOI MOSFET Using Gate-Recessed Structure (게이트가 파인 구조를 이용한 SOI MOSFET에서의 항복전압 개선)

  • 최진혁;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.159-165
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    • 1995
  • A gate-recessed structure is introduced to SOI MOSFET's in order to increase the source-to-drain breakdown voltage. A significant increase in the breakdown voltage is observed compared with that of a planar single source/drain SOI MOSFET without inducing the appreciable reduction of the current drivability. We have analyzed the origin of the breakdown voltage improvement by the substrate current measurements and 2-D device simulations, and shown that the breakdown voltage improvement is caused by the reductions in the impact ionization rate and the parasitic bipolar current gain.

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Analysis of Arbitrarily-Shaped Microstrip Antenna in Multi-Layered (다층 유전체에서 임의의 형상을 갖는 마이크로스트립 안테나의 해석)

  • Kim, Sang-Jin;Kim, Young-Sik;Cheon, Chang-Yul
    • Proceedings of the KIEE Conference
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    • 1998.07e
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    • pp.1821-1823
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    • 1998
  • In this paper, arbitrarily-shaped microstrip patch antenna in multi-layered is analyzed using spatial domain MoM. The triangular patch function is adopted here as the expansion function for planar arbitrarily-shaped microstrip. For example, an edge-fed rectangular patch antenna on a single-layered substrate is analyzed. The results show the agreement between the calculation and measurement.

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Application of Micromachining in the PLC Optical Splitter Packaging

  • Choi, Byoung-Chan;Lee, Man-Seop;Choi, Ji-Hoon;Park, Chan-Sik
    • Journal of the Optical Society of Korea
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    • v.7 no.3
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    • pp.166-173
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    • 2003
  • This paper presents micromachining results on planar-lightwave-circuit (PLC) chips with Si substrate and the quartz substrate by using Ti:Sapphire femtosecond-pulsed laser. The ablation process with femtosecond laser pulses generates nothing of contamination, molten zone, microcracks, shock wave, delamination and recast layer. We also showed that the micromachine for PLC using femtosecond pulsed lasers is superior to that using nanosecond pulsed lasers. The insertion loss and the optical return loss of the 1 ${\times}$ 8 optical power splitters packaged with micromachined input- and output-port U-grooves were less than 11.0 ㏈ and more than 55 ㏈, respectively. The wavelength dependent loss (WDL) was distributed within $\pm$0.6 ㏈ and the polarization dependent loss (PDL) was less than 0.2 ㏈.

A study on the Etching and Dielectric Properties of PZT Thin Films with Excess Pb Contents (Pb 함량에 따른 PZT 박막의 식각 및 유전특성에 관한 연구)

  • Kim, Kyoung-Tae;Lee, Sung-Gap;Kim, Chang-Il;Lee, Young-Hie
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.56-59
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    • 2000
  • In this study, Ferroelectric $Pb(Zr_x,Ti_{1-x})O_3$(x=0.53) thin films were fabricated by the spin-coating on the Pt/Ti/$SiO_2$/Si substrate using the PZT metal alkoxide solutions with various excess Pb contents. Etching of PZT film was performed using planar inductively coupled Ar(20)$/Cl_2/BCl_3$ plasma. The etch rate of PZT film was 2450 ${\AA}/min$ at Ar(20)$/BCl_3$(80) gas mixing ratio and substrate temperature of $80^{\circ}C$. The leakage current densities of before etching and after etching PZT thin film were $6.25\times10^{-8}A/cm^2$, $8.74\times10^{-7}A/cm^2$ with electric field of 0.07MV/em, respectively.

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Fabrication of Substrate Integrated Waveguide (SIW)-based Shielded Stripline using Silicon Anisotropic Wet-Etch and BCB-based Polymer Bonding (실리콘 이방성 습식 식각과 BCB 폴리머 접합을 이용한 기판 집적형 도파관(SIW) 기반의 차폐된 스트립선로의 제작)

  • Bang, Yong-Seung;Kim, Nam-Gon;Kim, Jung-Mu;Cheon, Chan-Gyul;Kwon, Young-Woo;Kim, Yong-Kweon
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1513_1514
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    • 2009
  • This paper reports on a fabrication of novel substrate integrated waveguide (SIW)-based shielded stripline applicable to the broadband transverse electromagnetic (TEM) single-mode propagation. We suggested a structure for half-SIW and half-shielded stripline, which combined through the benzocyclobutene (BCB) bonding layer. The electrical interconnection between the sidewall of anisotropic wet-etched silicon and patterned BCB layers is measured subsequent to the metalization on the side wall. The proposed SIW-based shielded stripline has great potential in terms of simple fabrication, integration with planar circuits and monolithic system fabricated on a SIW structure.

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