• Structural Engineering and Mechanics
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• v.82 no.2
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• pp.245-258
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• 2022

Many Structural Health Monitoring (SHM) methods have been proposed for structural damage diagnosis and prognosis. However, SHM for pinched hysteretic structures can be problematic due to the high level of nonlinearity. The model-free hysteresis loop analysis (HLA) has displayed notable robustness and accuracy in identifying damage for full-scaled and scaled test buildings. In this paper, the performance of HLA is compared with seven other SHM methods in identifying lateral elastic stiffness for a six-story numerical building with highly nonlinear pinching behavior. Two successive earthquakes are employed to compare the accuracy and consistency of methods within and between events. Robustness is assessed across sampling rates 50-1000 Hz in noise-free condition and then assessed with 10% root mean square (RMS) noise added to responses at 250 Hz sampling rate. Results confirm HLA is the most robust method to sampling rate and noise. HLA preserves high accuracy even when the sampling rate drops to 50 Hz, where the performance of other methods deteriorates considerably. In noisy conditions, the maximum absolute estimation error is less than 4% for HLA. The overall results show HLA has high robustness and accuracy for an extremely nonlinear, but realistic case compared to a range of leading and recent model-based and model-free methods.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.750-754
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• 2014

Emulations of memristor-family elements are very important, since their physical realizations are very difficult to achieve with recent technologies. Although some previous studies succeeded in designing memristor and memcapacitor emulators, no significant contribution towards meminductor emulator has been presented so far. The implementation of a meminductor emulator is very important, since real meminductors are not expected to appear in near future. We designed the first meminductor emulator whose inductance can be varied by an external current source without employing any memrisitve system. The principle of our architecture and its feasibility have been verified using SPICE simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.5
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• pp.1-9
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• 2012

Memristor which is known as fourth basic circuit element has been developed recently but its electrical characteristics are not still fully understood. Memristor has the incremental and decremental feature of the resistance depending upon the connected polarities. Also, its operational behavior become diverse depending on its connection topologies. In this work, electrical characteristics of diverse types of serial and parallel connections are investigated using the HP $TiO_2$ model. The characteristics are analyzed with pinched hystersis loops on the V-I plane when sine input signal is applied. The results of the work would be utilized usefully for analyzing the characteristics of memristor element and applications to logic circuit and neuron cells.

• Journal of the Korean Ceramic Society
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• v.41 no.5
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• pp.401-405
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• 2004

Undoped SrB $i_2$T $a_2$O$_{9}$, donor-doped Sr$_{0.99}$B $i_2$(Ta$_{0.99}$W$_{0.01}$)$_2$O$_{9}$ and acceptor-doped SrB $i_2$(Ta$_{0.99}$Ti$_{0.01}$)$_2$O$_{8.99$ ceramics were prepared and their microstructure, ferroelectric P-E hysteresis and Curie temperature were investigated. Grain size did not influence P-E hysteresis curve in undoped SrB $i_2$T $a_2$O$_{9}$ ceramics. Donor-Doped Sr$_{0.99}$B $i_2$(Ta$_{0.99}$W$_{0.01}$)$_2$O$_{9}$ ceramics showed more saturated P-E hysteresis curve with larger remanent polarization (P$_{r}$) than undoped SrB $i_2$T $a_2$O$_{9}$ ceramics while acceptor-doped SrB $i_2$(Ta$_{0.99}$Ti$_{0.01}$)$_2$O$_{8.99}$ ceramics led to a pinched P-E hysteresis loop. Larger polarization in donor-doped Sr$_{0.99}$B $i_2$(Ta$_{0.99}$W$_{0.01}$)$_2$O$_{9}$ ceramics resulted from easier domain wall motion by Sr-vacancies.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.49-58
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• 2015

A floating type of memristor emulator which acts like the behavior of $TiO_2$ memristor has been developed. Most of existing memristor emulators are grounded type which is built disregarding the connectivity with other memristor or other devices. The developed memristor emulator is a floating type whose output does not need to be grounded. Therefore, the emulator is able to be connected with other devices and be utilized for the interoperability test with various other circuits. To prove the floating function of the proposed memristor emulator, a Wheatstone bridge is built by connecting 4 memristor emulators in series and parallel. Also this bridge circuit suggest that it is possible to weight calculation of the neural network synapse.