• Journal of Power Electronics
• /
• v.13 no.3
• /
• pp.487-496
• /
• 2013

The three-phase synchronous reference frame phase-locked loop (SRF-PLL) is widely used for synchronization applications in power systems. In this paper, a new control strategy for three-phase grid-connected LCL inverters without a PLL is presented. According to the new strategy, a current reference can be generated by using the instantaneous power control scheme and the proposed positive-sequence voltage detector. Through theoretical analysis, it is indicated that a high-quality grid current can be produced by introducing the new control strategy. In addition, a kind of independent control for reactive power can be achieved under unbalanced and distorted grid conditions. Finally, the excellent performance of the proposed control strategy is validated by means of simulation and experimental results.

• 제어로봇시스템학회:학술대회논문집
• /
• 2001.10a
• /
• pp.108.2-108
• /
• 2001

This paper presents the application of adaptive phase-locked loop (adaptive PLL) technique to control the process variable of the process control system. The adaptive algorithm is related to the error. When the error of the system is changed, the adaptive gain will be directly changed according to the error. If the value of the adaptive gain is large, the value of the error will be large. In this experiment, the reference input is 50% step input. The experimental result in controlling the first order lag process by the adaptive PLL shows that the response of the controlled system has no overshoot, short rise time, and zero steady-state error. The experimental result also shows that when the output disturbance enters to the process control system, the adaptive PLL can maintain the stability of the system and the effect of the output disturbance can also be fast rejected. The adaptive PLL has better performance ...

• Journal of Institute of Control, Robotics and Systems
• /
• v.18 no.6
• /
• pp.546-554
• /
• 2012

This paper suggests a design method of an improved phase control loop for tracking resonant frequency of solid type precision resonant gyroscope. In general, a low cost MEMS gyroscope adapts the automatic gain control loops by taking a velocity feedback configuration. This control technique for controlling the resonance amplitude shows a stable performance. But in terms of resonant frequency tracking, this technique shows an unreliable performance due to phase errors because the AGC method cannot provide an active phase control capability. For the resonance control loop design of a solid type precision resonant gyroscope, this paper presents a phase domain control loop based on linear PLL (Phase Locked Loop). In particular, phase control loop is exploited using a higher order PLL loop filter by extending the first order active PI (Proportion-Integral) filter. For the verification of the proposed loop design, a hemispherical resonant gyroscope is considered. Numerical simulation result demonstrates that the control loop shows a robust performance against initial resonant frequency gap between resonator and voltage control oscillator. Also it is verified that the designed loop achieves a stable oscillation even under the initial frequency gap condition of about 25 Hz, which amounts to about 1% of the natural frequency of a conventional resonant gyroscope.

• Journal of Power Electronics
• /
• v.18 no.5
• /
• pp.1347-1356
• /
• 2018

In a three-phase system, three-phase AC signals can be translated into two-phase DC signals through a coordinate transformation. Thus, the PI regulator can realize a zero steady-state error for the DC signals. In the control of a three-phase grid-connected inverter, the phase angle of grid is normally detected by a phase-locked loop (PLL) and takes part in a coordinate transformation. A novel control strategy for a three-phase grid-connected inverter with a frequency-locked loop (FLL) based on coordinate transformation is proposed in this paper. The inverter is controlled as a current supply. The grid angle, which takes part in the coordinate transformation, is replaced by a periodic linear changing angle from $-{\pi}$ to ${\pi}$. The changing angle has the same frequency but a different phase than the grid angle. The frequency of the changing angle tracks the grid frequency by the negative feedback of the reactive power, which forms a FLL. The control strategy applies to non-ideal grids and it is a lot simpler than the control strategies with a PLL that are applied to non-ideal grids. The structure of the FLL is established. The principle and advantages of the proposed control strategy are discussed. The theoretical analysis is confirmed by experimental results.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.20 no.2
• /
• pp.152-159
• /
• 2015

In a weak grid condition, the precise grid impedance estimation is essential to guaranteeing the high performance current control and power transfer for a grid-connected inverter. This study proposes a precise estimation method for grid impedance by PQ variations by employing the variation method of reference currents. The operation principle of grid impedance estimation is fully presented, and the negative impact of the phase locked loop is analyzed. Estimation error by a synchronization angle in the park's transformation using the phase locked loop is derived. As a result, the variation method of reference currents for accurate estimation is introduced. The validation of the proposed method is verified through several simulation results and experiments based on a 2-kW voltage source inverter prototype.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.3 no.4
• /
• pp.188-193
• /
• 2003

This paper describes a novel burst-mode clock and data recovery (CDR) circuit which can be used for 622Mbps burst mode applications. The CDR circuit is basically a phase locked loop (PLL) having two phase detectors (PDs), one for the reference clock and the other for the NRZ data, whose operations are controlled by an external control signal. This CDR was fabricated in a 1-poly 5-metal $0.25{\;}\mu\textrm{m}$ CMOS technology. Jitter generation, burst/continuous mode data receptions were tested. Operational frequency range is 320Mhz~720Mhz and BER is less than 1e-12 for PRBS31 at 622Mhz. For the same data sequence, the extracted clock jitter is less than 8ps rms. Power consumption of 100mW was measured without I/O circuits.

• Proceedings of the KIEE Conference
• /
• 1990.07a
• /
• pp.332-335
• /
• 1990

A digital phase-locked loop speed control system of a self-controlled permanent magnet synchronous mortar fed by a voltage source inverter is presented. This paper discribes the hardware and software design of the system. Variable speed control system for self-controlled permanent magnet synchronous motor is proposed. Simulation results demonstrate the validity of proposed methods. This proposed control technique is implemented by using a microprocessor-based system.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.22 no.3
• /
• pp.270-275
• /
• 2017

This paper proposes a double-phase-locked-loop (PLL) to improve the performance of position estimation in hall sensor-based permanent magnet synchronous motor control. In hall sensor-based control, a PLL is normally used to estimate the rotor position. The proposed Double-PLL consists of two PLLs, including a reset type integrator. The motor control is more accurate and has better performance than conventional PLL, such as a small estimated position ripple. The validity of the proposed algorithm is verified by simulations and experiments.

• Journal of Astronomy and Space Sciences
• /
• v.27 no.2
• /
• pp.145-152
• /
• 2010

In this paper, we developed a local oscillator (LO) system of millimeter wave band receiver for radio astronomy observation. We measured the phase and amplitude drift stability of this LO system. The voltage control oscillator (VCO) of this LO system use the 3 mm band Gunn oscillator. We developed the digital phase locked loop (DPLL) module for the LO PLL function that can be computer-controlled. To verify the performance, we measured the output frequency/power and the phase/amplitude drift stability of the developed module and the commercial PLL module, respectively. We show the good performance of the LO system based on the developed PLL module from the measured data analysis. The test results and discussion will be useful tutorial reference to design the LO system for very long baseline interferometry (VLBI) receiver and single dish radio astronomy receiver at the 3 mm frequency band.

• Journal of Power Electronics
• /
• v.13 no.2
• /
• pp.322-328
• /
• 2013

This paper presents a modified Current Source Parallel Resonant Push-pull Inverter (CSPRPI) for single phase induction heating applications. One of the most important problems associated with current source parallel resonant inverters is achieving ZVS in transient intervals. This paper shows that a CSPRPI with the integral cycle control method has dynamic ZVS. According to this method, it is the Phase Locked Loop (PLL) circuit that tracks the switching frequency. The advantages of this technique are a higher efficiency, a smaller package size and a low EMI in comparison with similar topologies. Additionally, the proposed modification results in a low THD of the ac-line current. It has been measured as less than %2. To show the validity of the proposed method, a laboratory prototype is implemented with an operating frequency of 80 kHz and an output power of 400 W. The experimental results confirm the validity of the proposed single phase induction heating system.