• Journal of Power Electronics
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• v.11 no.3
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• pp.360-368
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• 2011

This paper proposes an active frequency with a positive feedback in the d-q frame anti-islanding method suitable for a robust phase-locked loop (PLL) algorithm using the FFT concept. In general, PLL algorithms for grid-connected PV PCS use d-q transformation and controllers to make zero an imaginary part of the transformed voltage vector. In a real grid system, the grid voltage is not ideal. It may be unbalanced, noisy and have many harmonics. For these reasons, the d-q transformed components do not have a pure DC component. The controller tuning of a PLL algorithm is difficult. The proposed PLL algorithm using the FFT concept can use the strong noise cancelation characteristics of a FFT algorithm without a PI controller. Therefore, the proposed PLL algorithm has no gain-tuning of a PI controller, and it is hardly influenced by voltage drops, phase step changes and harmonics. Islanding prediction is a necessary feature of inverter-based photovoltaic (PV) systems in order to meet the stringent standard requirements for interconnection with an electrical grid. Both passive and active anti-islanding methods exist. Typically, active methods modify a given parameter, which also affects the shape and quality of the grid injected current. In this paper, the active anti-islanding algorithm for a grid-connected PV PCS uses positive feedback control in the d-q frame. The proposed PLL and anti-islanding algorithm are implemented for a 250kW PV PCS. This system has four DC/DC converters each with a 25kW power rating. This is only one-third of the total system power. The experimental results show that the proposed PLL, anti-islanding method and topology demonstrate good performance in a 250kW PV PCS.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.6
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• pp.50-56
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• 2015

An efficient fast response hysteretic buck converter suitable for mobile application is propoesed. The problems of large output ripple and difficulty in using of small power inductor that conventional hysteretic converter has are improved by adding ramp generator. and the changeable switching frequency with load current is fixed by adding a delay time control circuit composed of PLL structure resulting in decrease of EMI noise. The circuits are implemented by using BCDMOS 0.35um 2-polt 4-metal process. Measurement results show that the converter operates with a switching frequency of 1.85MHz when drives 80mA load current. As the converter drives over 170mA load current, the switching frequency is fixed on 2MHz. The converter has output ripple voltage of less 20mV and more than efficiency 85% with 50~500mA laod current condition.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.23-30
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• 2005

This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.5
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• pp.348-355
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• 2019

UHF and microwave RFID systems are widely applied in various fields because they can read a plurality of tag information within a radius of several meters ahead of the RFID reader. However, they cannot detect the position of the tag in applications that recognize only a tag at a specific position. In this study, we propose a new RFID system that can interrogate the tag of a specific location selectively by using the position information of the tag. This can be done by only adjusting the reader's operating frequency. To verify the feasibility of the proposed system, we implemented a 2.4 GHz RFID reader whose frequency can be varied by using a phase-locked loop circuit and a backscattered tag. Experimental results confirm that the tag position can be sensed exactly.

• Journal of the Korea Society of Computer and Information
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• v.17 no.12
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• pp.31-39
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• 2012

In this paper, we propose a microprocessor-based automatic voltage regulator(AVR) to reduce consumers' electric energy consumption and to help controlling peak demanding power. Hybrid Switching Automatic Voltage Regulator (HS-AVR) consist of a toroidal core, several tap control switches, display and command control parts. The coil forms an autotransformer which has a serial main winding and four parallel auxiliary windings. It controls the output voltage by changing the combination of the coils and the switches. Relays are adopted as the link switches of the coils to minimize the loss. To make connecting and disconnecting time accurate, relays of the circuit have parallel TRIACs. A software phase locked loop(PLL) has been used to synchronize the timings of the switches to the voltage waveform. The software PLL informs the input voltage zero-crossing and positive/negative peak timing. The traditional voltage transformers and AVRs have a disadvantage of having a large mandatory capacity to accommodate maximum inrush current to avoid the switch contact damage. But we propose a suitable AVR for every purpose in smart grid with reduced size and increased efficiency.