• 제목/요약/키워드: Phase Sequence Set

검색결과 38건 처리시간 0.025초

OFDM 시스템의 Crest 값을 감소하기 위한 SLM 기법의 위상 시퀀스에 관한 연구 (On the Phase Sequence Set of SLM Scheme for Crest Factor Reduction in OFDM System)

  • 임대운;허석중;노종선;정하봉
    • 한국통신학회논문지
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    • 제31권9C호
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    • pp.889-896
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    • 2006
  • 본 논문은 직교 주파수 분할 다중 반송파 (OFDM) 시스템에서 입력 심볼 시퀀스의 주기와 연관하여 crest 값의 확률 분포를 유도하였고, 이로부터 입력 심볼 시퀀스의 주기가 짧을수록 OFDM 신호가 확률적으로 큰 crest 값을 갖는다는 것을 보인다. 다음으로 해밍 거리가 D인 두 입력 심볼 시퀀스의 crest 값 관계를 유도 한다. 이 두 결과를 이용하여 OFDM 시스템의 crest 값을 감소하기 위한 선택 사상 기법(SLM)에서 사용되는 위상 시퀀스 집합의 두 가지 조건을 제시한다. 마지막으로 m-시퀀스를 순환 이동하여 생성한 순환 하다마드 (cyclic Hadamard) 행렬의 행들로 구성한 집합을 최적에 근사한 위상 시퀀스 집합으로 제안한다.

교통신호의 페이스순서 및 페이스간격을 고려한 신호최적화 (Optimum signal setting based on phase sequence and interval in an isolated intersection)

  • 김경철;임강원
    • 대한교통학회지
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    • 제14권2호
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    • pp.45-58
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    • 1996
  • In a large signal intersection, it is the most important to set phase sequences and phase intervals of traffic signal in order to improve the efficiency of the capacity as well as safety. These setting allows to select the best sequence of signal phase among several alternatives, and thus to rearrange the starting and ending points of the individual phase using an effective interphase periods (EIP). The EIP is a gap between previous and current traffic movements at a potential collision point in an intersection. Each of traffic movements has an equality for safety and efficiency at the balanced condition of EIP. This paper presents how to set optimally the phase sequences and intervals of traffic signal in an intersection using phase based approach. And in the second part, we applied the theory developed in the first part. In particular, a numerical example of phase base signal setting is presented using a matrix computation method in order to select the best sequence among several alternatives, and thus to rearrange the starting and ending points of the individual phase using the EIP. This method also allows to apply to optimum signal setting even in five-lag or staggered-type intersection.

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4진 낮은 상관 구역 수열군의 새로운 생성법 (A New Construction Method of Quaternary LCZ Sequence Set)

  • 장지웅;김영식;임대운
    • 한국통신학회논문지
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    • 제34권2C호
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    • pp.153-157
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    • 2009
  • 본 논문에서는 짝수 N에 대하여 매개 변수가 (N,M,L,$\varepsilon$)인 이진 낮은 상관 구역 수열군(LCZ sequence)를 이용하여 동일한 매개 변수를 갖는 4진 낮은 상관 구역 수열군을 생성하는 방법을 제시한다. 새로 제안된 생성법은 이진 낮은 상관 구역 수열과 위상을 변화시킨 수열에 Krone와 Sarwate의 논문에 나온 역 gray 사상을 적용하였다. 본 논문에서 제시하는 생성법은 주기 N이 짝수인 모든 이진 낮은 상관 구역 수열군에 적용하는 것이 가능하다.

De novo 시퀀스 어셈블리의 overlap 단계의 최근 연구 실험 분석 (Experimental Analysis of Recent Works on the Overlap Phase of De Novo Sequence Assembly)

  • 임지혁;김선;박근수
    • 정보과학회 논문지
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    • 제45권3호
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    • pp.200-210
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    • 2018
  • 여러 DNA 리드 시퀀스가 주어졌을 때, de novo 시퀀스 어셈블리는 레퍼런스 시퀀스 없이 하나의 시퀀스를 재조립한다. 재조립을 위해 de novo 시퀀스 어셈블리는 리드 사이의 모든 겹침을 계산하는 overlap 단계가 필요하다. Overlap 단계는 전체 연산 중 비용이 가장 많이 들기 때문에 어셈블리의 계산 성능을 좌우한다. 여러 분야에서 overlap 단계를 위한 연구가 많이 발표되고 있는데, 그 중 가장 최신의 세 연구 결과는 Readjoiner, SOF, Lim-Park 알고리즘이다. 최근 염기 분석기술의 큰 발전으로 DNA 리드 데이터 셋을 기존보다 저비용으로 대량 생산하는 것이 가능해져 DNA 리드 데이터 셋을 생성하는 여러 플랫폼들이 개발되었다. 각 플랫폼마다 생성하는 데이터 셋의 통계적 특성이 다르기 때문에 overlap 단계의 성능 평가 시 다양한 통계적 특성의 데이터 셋이 반영되어야 한다. 본 논문은 여러 통계적 특성을 가진 DNA 리드 데이터 셋을 이용하여 위의 세 알고리즘의 성능을 비교 분석한다.

A Geometric Constraint Solver for Parametric Modeling

  • Jae Yeol Lee;Kwangsoo Kim
    • 한국CDE학회논문집
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    • 제3권4호
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    • pp.211-222
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    • 1998
  • Parametric design is an important modeling paradigm in CAD/CAM applications, enabling efficient design modifications and variations. One of the major issues in parametric design is to develop a geometric constraint solver that can handle a large set of geometric configurations efficiently and robustly. In this appear, we propose a new approach to geometric constraint solving that employs a graph-based method to solve the ruler-and-compass constructible configurations and a numerical method to solve the ruler-and-compass non-constructible configurations, in a way that combines the advantages of both methods. The geometric constraint solving process consists of two phases: 1) planning phase and 2) execution phase. In the planning phase, a sequence of construction steps is generated by clustering the constrained geometric entities and reducing the constraint graph in sequence. in the execution phase, each construction step is evaluated to determine the geometric entities, using both approaches. By combining the advantages of the graph-based constructive approach with the universality of the numerical approach, the proposed approach can maximize the efficiency, robustness, and extensibility of geometric constraint solver.

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불평형 계통전압에 강인한 연료전지용 전력변환시스템의 PLL 방법 (A Robust PLL of PCS for Fuel Cell System under Unbalanced Grid Voltages)

  • 김윤현;김왕래;임창진;김광섭;권병기;최창호
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2008년도 하계학술대회 논문집
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    • pp.103-105
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    • 2008
  • In grid-interconnection system, a fast, robust and precise phase angle detector is most important to grid synchronization and the active power control. The phase angle can be easily estimated by synchronous dq PLL system. On the other hand under unbalanced voltage condition, synchronous dq PLL system has problem that harmonics occur to phase angle or magnitude of grid voltage because of the effect of the negative sequence components. So, To eliminate the negative sequence components, the PLL method using APF (All Pass Filter) in a stationery reference frame to extract positive sequence components under unbalanced voltage condition is researched. In this paper, we propose a new PLL method with decoupling network using APF in a synchronous reference frame to extract the positive sequence components of the grid voltage under unbalanced grid. The cut-off frequency of APF in a synchronous reference frame can be set to twice of the fundamental frequency comparing with that of APF in a stationery reference frame which is the fundamental frequency. The proposed PLL strategy can detect the phase angle quickly and accurately under unbalanced gird voltages. Simulation and experimental results are presented to verify the proposed strategy under different kind of voltage dips.

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Compensation of Source Voltage Unbalance and Current Harmonics in Series Active and Shunt Passive Power Filters

  • Lee G-Myoung;Lee Dong-Choon
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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    • pp.586-590
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    • 2001
  • In this paper, a novel control scheme compensating source voltage unbalance and harmonic currents for hybrid active power filters is proposed, where no low/high-pass filters are used in compensation voltage composition. The phase angle and compensation voltages for source harmonic current and unbalanced voltage components are derived from the positive sequence component of the unbalanced voltage set, which is simply obtained by using digital all-pass filters. Since a balanced set of the source voltage obtained by scaling the positive sequence components is used as reference values for source current and load voltage, it is possible to eliminate the necessity of low/high-pass filters in the reference generation. Therefore the control algorithm is much simpler and gives more stable performance than the conventional method. In addition, the source harmonic current is eliminated by compensating for the harmonic voltage of the load side added to feedback control of the fundamental component.

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DNA 염기 서열의 단편 조립 프로그램 개발

  • 이병욱;박기정;박완;박용하
    • 한국미생물·생명공학회지
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    • 제25권6호
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    • pp.560-565
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    • 1997
  • DNA fragment assembly is a major concem in shot-gun DNA sequencing project. It is to reconstruct a consensus DNA sequence from a collection of random oritented fragments. We developed a computer program that is useful for DNA fragment assembly. Inputs to the program are DNA fragment sequences including IUB-IUPAC bases. The program produces the most probable reconstruction ot the original DNA sequence as a text format or a PostScript format. The program consists of four phases: the first phase quickly eliminates fragment pairs that can not possibly overlap. In the second phase, the quality of overlap between each pair is calculated to a score. In the third phase, overlap pairs are sorted by their scores and consistency of the overlaps is checked. The last phase determines consensus sequences and displays them. The performance of fragment assembly program was tested on a set of DNA fragment sequences which were generated from long DNA sequences of GenBank by a fragmentation program.

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위상천이 영사식 모아레법을 이용한 고속 3차원 형상복원 (East 3-Dimensional Shape Reconstruction Using Phase-Shifting Grating Projection Moire Method)

  • 최이배;구본기;정연구
    • 한국감성과학회:학술대회논문집
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    • 한국감성과학회 1998년도 추계학술발표 논문집
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    • pp.111-115
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    • 1998
  • A phase-shifting projection moire method particularly intended for high-speed three-dimensional shape reconstruction of diffuse objects is presented. Emphasis is on realization of phase-shifting fringe analysis in projection moire topography using a set of line grating pairs designed to provide different phase shifts in sequence. Further a time-integral fringe capturing scheme is devised to remove undesirable high frequency original grating patterns in real-time without time-consuming software image processing. Finally the performances of the proposed method are discussed with measurement results.

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불균등 임피던스 선로를 갖는 인버터기반 분산전원의 부하전압 불평형을 보상하는 드룹 제어 (Droop Control to Compensate Load Voltage Unbalance for Inverter-based Distributed Generations with Unequal Impedance Lines)

  • 양원모;김현준;한병문
    • 전기학회논문지
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    • 제65권7호
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    • pp.1193-1203
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    • 2016
  • This paper proposes a droop control scheme to compensate the unbalanced line-to-line voltage of unbalanced 3-phase load which is coupled with two inverter-based distributed generations through unequal impedance lines. Unbalanced line-to-line load voltages occur due to using single-phase loads, which brings about bad effects on the coupled inverters and the distributed generations. In order to compensate the unbalanced line-to-line voltages, a positive sequence voltage control was used for sharing the active and reactive power and a negative sequence control was used for reducing the negative sequence voltage. The feasibility of the proposed scheme was first verified by computer simulations, and then experiments with a hardware set-up built in the lab. The experimental results were compared with the simulation results to confirm the feasibility of the proposed scheme.