• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.4
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• pp.443-451
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• 2010

This paper describes a fully integrated CMOS low-IF mobile-TV RF tuner for Band-III T-DMB/DAB applications. All functional blocks such as low noise amplifier, mixers, variable gain amplifiers, channel filter, phase locked loop, voltage controlled oscillator and PLL loop filter are integrated. The gain of LNA can be controlled from -10 dB to +15 dB with 4-step resolutions. This provides a high signal-to-noise ratio and high linearity performance at a certain power level of RF input because LNA has a small gain variance. For further improving the linearity and noise performance we have proposed the RF VGA exploiting Schmoock's technique and the mixer with current bleeding, which injects directly the charges to the transconductance stage. The chip is fabricated in a 0.18 um mixed signal CMOS process. The measured gain range of the receiver is -25~+88 dB, the overall noise figure(NF) is 4.02~5.13 dB over the whole T-DMB band of 174~240 MHz, and the measured IIP3 is +2.3 dBm at low gain mode. The tuner rejects the image signal over maximum 63.4 dB. The power consumption is 54 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.75-82
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• 2010

This paper presents a wideband ${\Delta}{\Sigma}$ fractional-N frequency synthesizer for a multi-band single chip CMOS RFIC transceivers. A wideband VCO utilizes a 6-bit switched capacitor array bank for 2340~3940 MHz frequency range. VCO frequency calibration circuit is designed for optimal capacitor bank code selection before phase locking process. It finishes the calibration process in $2{\mu}s$ over the whole frequency band. The LO generation block has selectable multiple division ratios of ${\div}2$, ${\div}16$, and ${\div}32$ to generate LO I/Q signals for T-DMB/DAB/FM Radio systems in L-Band (1173~1973 MHz), VHF-III (147~246 MHz), VFH-II (74~123 MHz), respectively. The measured integrated phase noise is quite low as it is lower than 0.8 degree RMS over the whole frequency band. Total locking time of the ${\Delta}{\Sigma}$ frequency synthesizer including VCO frequency calibration time is less than $50{\mu}s$. The wideband ${\Delta}{\Sigma}$ fractional-N frequency synthesizer is fabricated in $0.13{\mu}m$ CMOS technology, and it consumes 15.8 mA from 1.2 V DC supply.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.4
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• pp.17-24
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• 2014

In this paper, we propose a CMOS FM RX front-end structure with an automatic tunable input matching network and implement it using a 65nm CMOS technology. The proposed FM RX front-end is designed to change the resonance frequency of the input matching network at the low noise amplifier (LNA) according to the channel frequency selected by a phase-locked loop (PLL) for maintaining almost constant sensitivity level when an embedded antenna type with high frequency selectivity characteristic is used for FM receiver. The simulation results of implemented FM front-end show about 38dB of voltage gain, below 2.5dB of noise figure, and -15.5dBm of input referred intercept point (IIP3) respectively, while drawing only 3.5mA from 1.8V supply voltage including an LO buffer.

• Proceedings of the Korean Information Science Society Conference
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• 1998.10a
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• pp.68-70
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• 1998

본 논문에서는 클록들을 주기적으로 동기화하는 분산 실시간 시스템에서 주어진 태스크의 시간 제약(timing constraint)을 변환시는 구가지 기법을 제안한다. 전형적인 이산 클록 동기화(discrete clock synchronization)알고리즘은 클록의 값을 순간적으로 보정(correct)하여 클록의 시간이 불연속적으로 진행학 한다. 이러한 시간상의 불연속성은 태스크의 시작제한시간(release time)이나 종료시한(deadline)과 같은 이벤트를 잃어버리거나 다시 발생시키는 오류를 범하게 한다. 클록 시간의 불연속성을 피하기 위해 일반적으로 연속 클록 동기화(continuous clock synchronization) 기법이제안되었지만 소프트웨어적으로 구현되기에는 많은 오버헤드를 유발시키는 문제점이 있다. 이에 따라 연속 클록 동기화는 PLL (Phase-Locked Loop)을 이용한 별도의 하드웨어를 사용하는 것이 보통이다. 본 논문에서는 연속 클록 동기화 기법을 사용하는 대신, 태스크의 시간 제약을 동적으로 변환시키는 DCT (Dynamic Constraint Transformation) 기법을 제안하였다. DCT는 소프트웨어 으로 구현이 가능하여 새로운 하드웨어를 필요로 하지 않으며, 이를 통해 기존의 이산적으로 동기화된 시스템에서 클록 시간의 불연속성에 의한 문제점들을 해결할 수 있다. 또 다른 문제점으로서, 클록의 물리적인 특성으로 인해 동기화된 클록들이 상한된(bounded from the above)오차(skew)를 갖는다는 것이다. 이러한 오차는 지역 클록(local clock)에 대해 만족될 수 있는 임의의 실기간 제약 조건이 전역 클록(global clock)에 대해서는 만족되지 않을 수 있음을 의미한다. 본 논문에서는 이를 위해 먼저 두 가지의 스케줄링 가능성, 지역적 스케줄링 가능서(local schedulability)과 전역적 스케줄링 가능성(global schedulability)을 정의하고, 실시간 제약을 정적으로 변환시키는 SCT (Static Constraint Transformation)기법을 제안하였다. SCT를 통해 지역적으로 스케줄링 가능한 태스크는 전역적으로 스케줄링이 가능하므로, 단지 지역적 스케줄링 가능성만을 검사하면서 스케줄링 문제를 해결할 수 있도록 하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.498-498
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• 2013

Atmospheric Pressure Plasmas have pioneered a new field of plasma for biomedical application bridging plasma physics and biology. Biological and medical applications of plasmas have attracted considerable attention due to promising applications in medicine such as electro-surgery, dentistry, skin care and sterilization of heat-sensitive medical instruments [1]. Traditional approaches using electronic devices have limits in heating, high voltage shock, and high current shock for patients. It is a great demand for plasma medical industrial acceptance that the plasma generation device should be compact, inexpensive, and safe for patients. Microwave-excited micro-plasma has the highest feasibility compared with other types of plasma sources since it has the advantages of low power, low voltage, safety from high-voltage shock, electromagnetic compatibility, and long lifetime due to the low energy of striking ions [2]. Recent experiment [2] shows three-log reduction within 180-s treatment of S. mutans with a low-power palm-size microwave power module for biomedical application. Experiments using microwave plasma are discussed. This low-power palm-size microwave power module board includes a power amplifier (PA) chip, a phase locked loop (PLL) chip, and an impedance matching network. As it has been a success, more compact-size module is needed for the portability of microwave devices and for the various medical applications of microwave plasma source. For the plasma generator, a 1.35-GHz coaxial transmission line resonator (CTLR) [3] is used. The way of reducing the size and enhancing the performances of the module is examined.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.1028-1035
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• 1999

To increase the throughput of data transmission in burst-mode TDMA communication systems and also to get a good BER performance at the same time, it is essential to rapidly acquire the carrier while keeping the desirable tracking performance. To achieve this goal, in this paper, a new decision-directed carrier recovery algorithm is presented. The proposed scheme does not incorporate the PLL and suppress the Gaussian random process of input noise by the pre-stage low pass filter so as to get both the fast acquisition and a good performance. Through computer simulations, the performance of the scheme is analyzed with respect to the acquisition time and bit error rate. The cycle slip in the proposed scheme is seldom observed at very low SNR environment in contrast to the previous proposed one. Because of this merit, it is not required to do the differential encoding and decoding in the proposed scheme.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.2
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• pp.134-139
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• 2004

A clock recovery circuit for a 40 Gb/s optical receiver has been designed and implemented. The clock recovery circuit consists of pre-amplifiers, a nonlinear circuit with diodes, a bandpass filter and a clock amplifier. Before implementing the 40 Gb/s clock recovery circuit, a 10 Gb/s clock recovery circuit has been successfully implemented and tested. With the 40 Gb/s clock recovery circuit, when a 40 Gb/s signal of -10 dBm was applied to the input of the circuit, the 40 GHz clock was recovered with the -20 dBm output power after passing through the nonlinear circuit. The output signal from the nonlinear circuit passes through a narrow-band filter, and then amplified. The implemented clock recovery circuit is planned to be used for the input of a phase locked loop to further stabilize the recovered clock signal and to reduce the clock jitter.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.6
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• pp.50-56
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• 2015

An efficient fast response hysteretic buck converter suitable for mobile application is propoesed. The problems of large output ripple and difficulty in using of small power inductor that conventional hysteretic converter has are improved by adding ramp generator. and the changeable switching frequency with load current is fixed by adding a delay time control circuit composed of PLL structure resulting in decrease of EMI noise. The circuits are implemented by using BCDMOS 0.35um 2-polt 4-metal process. Measurement results show that the converter operates with a switching frequency of 1.85MHz when drives 80mA load current. As the converter drives over 170mA load current, the switching frequency is fixed on 2MHz. The converter has output ripple voltage of less 20mV and more than efficiency 85% with 50~500mA laod current condition.

• Korean Journal of Optics and Photonics
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• v.11 no.5
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• pp.306-311
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• 2000

This paper deals with the development of Laser Doppler Vibrometer (LDV) that can mea~ure the tlequency and amphlude of the ultrasonic vibralion. Hc-Ne laser (632.8 om) is used as a light source, and Michelson interferometer in winch frequency of the objective beam is shIfted by Bragg cell IS adopted The frequency modulated signal centered at 40 MHz flom the PIN diode IS amplified. down-col1vel1ed to 2.5 MHz, filtered and digiLized. The voltage output that is proportional to the velocity of the vibratwg surface is obtawed using digItal PLL. A microprocessor is used to extract the frequcncy aud amplitude of the vibratIOn from the voltage output. It is found that the developed LDV can measure up to 300 kHz vibratIOn and the mlillmUITI measurable amplitude is I nm at 300 kHz. We believe thatlhis LDV can be used to measure the vibratIOn of the heavy electric maclllnery and micro-size structures. tures.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.5
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• pp.348-355
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• 2019

UHF and microwave RFID systems are widely applied in various fields because they can read a plurality of tag information within a radius of several meters ahead of the RFID reader. However, they cannot detect the position of the tag in applications that recognize only a tag at a specific position. In this study, we propose a new RFID system that can interrogate the tag of a specific location selectively by using the position information of the tag. This can be done by only adjusting the reader's operating frequency. To verify the feasibility of the proposed system, we implemented a 2.4 GHz RFID reader whose frequency can be varied by using a phase-locked loop circuit and a backscattered tag. Experimental results confirm that the tag position can be sensed exactly.