• 제목/요약/키워드: Performance state

검색결과 7,981건 처리시간 0.037초

Performance Evaluation of Control Algorithms for 1/2 Tracked Vehicle with Semi-Active Suspension System (1/2 궤도차량에 대한 반능동 현수장치 제어 알고리즘들의 성능평가)

  • 윤일중;임재필;신휘범;이진규;신민재
    • Transactions of the Korean Society of Automotive Engineers
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    • 제9권4호
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    • pp.139-147
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    • 2001
  • 2 DOF half-car model with 6 semi-active suspension units is utilized to evaluate the tracked vehicle dynamic performance simulated by several suspension control algorithms. The target of this research is to improve the ride comfort to maintain operator's handling capability when the tracked vehicle travels fast on the rough road. The control algorithms for suspension systems, such as full state feedback active, full state feedback semi-active, sky-hook active, sky-hook semi-active, and on-off systems, are evaluated and analyzed in view point of ride comfort. The dynamic performances of vehicle are expressed and evaluated by vibratory characteristic evaluation curves, performance indices and frequency characteristic curves. The simulation results show that the performances of sky-hook algorithms for ride comfort nearly follow those of full state feedback algorithms and on-off algorithm is recommendatory when the vehicle runs relatively fast.

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Study on Electrochemical Performance of Solid-State-Electrode on Steel bar in Chloride Solution (염화물 수용액 중의 철근에 대한 고체전극의 전기화학적 성능 연구)

  • Park, Dong-Jin;Park, Jang-Hyun;Lee, Han-Seung;Subbiah, Karthick
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 한국건축시공학회 2018년도 춘계 학술논문 발표대회
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    • pp.147-148
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    • 2018
  • In order to compare the electrochemical performance with that of Calomel Electrode, MnO2 solid-state-electrode was fabricated and its potential and impedance were measured in chloride aqueous solution. As a result, the SCPS without chloride ions showed a potential of -200 mV or more and an impedance over 2000 Ωcm, but the potential below -600 mV and the impedance below -200 Ωcm showed as the chloride concentration in the solution increased. It is considered electrochemical studies on the corrosion of rebar are necessary for the MOE, which shows the same tendency as SCE and exhibits electrochemical performance, over the Mortar level in the future.

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An Enhanced Target State Estimation using Covariance Analysis Techniques for a Monopulse Sonar System (공분산 행렬 해석기법을 이용한 모노펄스 소나 표적상태 추정 성능 향상 기법)

  • Lee, Chang-Ho;Kim, Jea-Soo;Lee, Sang-Young;Kim, Kang;Oh, Woun-Chun;Cho, Woon-Hyun
    • The Journal of the Acoustical Society of Korea
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    • 제15권1호
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    • pp.34-39
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    • 1996
  • Target state estimation is a fundamental problem of the sonar signal processing. In this paper, the covariance analysis techniques are applied to enhance the performance of the target state estimation of a monopulse sonar system. MOST, the artificial target signal generator based on the highlight model is used to generate signals in various target states. The performance of the developed method has been evaluated by applying it to the various S/N. The enhanced performance of the covariance analysis method presented in this paper is discussed.

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SDRE Based Nonlinear Optimal Control of a Two-Wheeled Balancing Robot (SDRE 기법을 이용한 이륜 밸런싱 로봇의 비선형 최적제어)

  • Kim, Sang-Tae;Kwon, Sang-Joo
    • Journal of Institute of Control, Robotics and Systems
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    • 제17권10호
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    • pp.1037-1043
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    • 2011
  • Two-wheeled balancing mobile robots are currently controlled in terms of linear control methods without considering the nonlinear dynamical characteristics. However, in the high maneuvering situations such as fast turn and abrupt start and stop, such neglected terms become dominant and greatly influence the overall driving performance. This paper addresses the SDRE nonlinear optimal control method to take advantage of the exact nonlinear dynamics of the balancing robot. Simulation results indicate that the SDRE control outperforms LQR in the respect of transient performance and required wheel torques. A design example is suggested for the state matrix that provides design flexibility in the SDRE control. It is shown that a well-planned state matrix by reflecting the physics of a balancing robot greatly contributes to the driving performance and stability.

A Study on Gaussian Mixture Synthesis for High-Performance Speech Recognition (High-Performance 음성 인식을 위한 Efficient Mixture Gaussian 합성에 관한 연구)

  • 이상복;이철희;김종교
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(4)
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    • pp.195-198
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    • 2002
  • We propose an efficient mixture Gaussian synthesis method for decision tree based state tying that produces better context-dependent models in a short period of training time. This method makes it possible to handle mixture Gaussian HMMs in decision tree based state tying algorithm, and provides higher recognition performance compared to the conventional HMM training procedure using decision tree based state tying on single Gaussian GMMs. This method also reduces the steps of HMM training procedure. We applied this method to training of PBS, and we expect to achieve a little point improvement in phoneme accuarcy and reduction in training time.

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A Two-bit Bus-Invert Coding Scheme With a Mid-level State Bus-Line for Low Power VLSI Design

  • Yoon, Myungchul
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.436-442
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    • 2014
  • A new bus-invert coding circuit, called Two-bit Bus-Invert Coding (TBIC) is presented. TBIC partitions a bus into a set of two-bit sub-buses, and applies the bus-invert (BI) algorithm to each sub-bus. Unlike ordinary BI circuits using invert-lines, TBIC does not use an invert-line, so that it sends coding information through a bus-line. To transmit 3-bit information with 2 bus-lines, TBIC allows one bus-line to have a mid-level state, called M-state. TBIC increases the performance of BI algorithm, by suppressing the generation of overhead transitions. TBIC reduces bus transitions by about 45.7%, which is 83% greater than the maximum achievable performance of ordinary BI with invert-lines.

Inelastic Behavior of Continuous Precast Composite Slabs (연속 프리캐스트 합성바닥판의 비탄성 거동)

  • Shim Chang-Su;Chung Young Soo;Min Jin
    • Proceedings of the Korea Concrete Institute Conference
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    • 한국콘크리트학회 2005년도 봄학술 발표회 논문집(I)
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    • pp.447-450
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    • 2005
  • A prefabricated composite hollow slab with perforated I-beams was suggested for the replacement of deteriorated concrete decks or the construction of new composite bridges with long-span slabs. Composite slabs with embedded I-beams have considerably higher stiffness and strength. For the application of prefabricated composite slabs to bridges, joints between slabs should satisfy the requirements of the ultimate limit state and the serviceability limit state. In this paper, three types of the detail for loop joints were selected and their structural performance in terms of strength and crack control was investigated through static tests on continuous composite slabs. A main parameter was the detail of the joint, such as an ordinary loop joint and loop joint with additional reinforcements. Even though there was no connection of the steel beams at the joints, the loop joints showed good performance in terms of strength. In terms of crack control, the loop joint with additional reinforcements showed better performance. In ultimate limit state, the continuous composite slabs showed good moment redistribution and ductility.

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Residual Synchronization Error Elimination in OFDM Baseband Receivers

  • Hu, Xingbo;Huang, Yumei;Hong, Zhiliang
    • ETRI Journal
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    • 제29권5호
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    • pp.596-606
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    • 2007
  • It is well known that an OFDM receiver is vulnerable to synchronization errors. Despite fine estimations used in the initial acquisition, there are still residual synchronization errors. Though these errors are very small, they severely degrade the bit error rate (BER) performance. In this paper, we propose a residual error elimination scheme for the digital OFDM baseband receiver aiming to improve the overall BER performance. Three improvements on existing schemes are made: a pilot-aided recursive algorithm for joint estimation of the residual carrier frequency and sampling time offsets; a delay-based timing error correction technique, which smoothly adjusts the incoming data stream without resampling disturbance; and a decision-directed channel gain update algorithm based on recursive least-squares criterion, which offers faster convergence and smaller error than the least-mean-squares algorithms. Simulation results show that the proposed scheme works well in the multipath channel, and its performance is close to that of an OFDM system with perfect synchronization parameters.

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Flash Memory System for Solid-state Disk by Using Various Memory Cells (다양한 메모리 셀을 결합한 디스크형 플래쉬 메모리 시스템)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • IEMEK Journal of Embedded Systems and Applications
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    • 제4권3호
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    • pp.134-138
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    • 2009
  • We present a flash memory system with low cost and high performance for solid-state disk. The proposed flash system is constructed as a SLC with hot blocks and a MLC with cold blocks. Either the SLC or the MLC is selectively accessed on the basis of a position bit in a mapping table. Our results show that the system enables the SLC size to be reduced by about 80% relative to a conventional SLC while maintaining similar performance. And also, our system can improve a performance by above 60% comparing with a conventional MLC.

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FPGA-Based Design of Black Scholes Financial Model for High Performance Trading

  • Choo, Chang;Malhotra, Lokesh;Munjal, Abhishek
    • Journal of information and communication convergence engineering
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    • 제11권3호
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    • pp.190-198
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    • 2013
  • Recently, one of the most vital advancement in the field of finance is high-performance trading using field-programmable gate array (FPGA). The objective of this paper is to design high-performance Black Scholes option trading system on an FPGA. We implemented an efficient Black Scholes Call Option System IP on an FPGA. The IP may perform 180 million transactions per second after initial latency of 208 clock cycles. The implementation requires the 64-bit IEEE double-precision floatingpoint adder, multiplier, exponent, logarithm, division, and square root IPs. Our experimental results show that the design is highly efficient in terms of frequency and resource utilization, with the maximum frequency of 179 MHz on Altera Stratix V.