• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 연구회 합동 학술발표회 논문집
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• pp.18-22
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• 1998

A PWM inverter with an induction motor often has a problem with a high frequency leakage current that flows through stray capacitor between stator windings and a motor frame to ground. This paper presents an equivalent circuit for high frequency leakage currents in PWM inverter feeding an induction motor, which forms an LCR series resonant circuit. A conventional common mode ckoke or reactor in series between the ac terminals of a PWM inverter and those of an ac motor is not effective to reduce the rms and average values of the leakage current, but effective to reduce the peak value. Furthermore, this paper proposes a leakage current damper which is different in damping principle from the conventional common mode choke. It is shown theoretically and experimentally that the leakage current damper is able to reduce the rms value of the leakage current to 25%, where the core used in the leakage current damper is smaller than that of the conventional common-mode choke

• Journal of Power Electronics
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• 제17권2호
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• pp.315-322
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• 2017

LED is a promising new generation of green lighting with the advantages of high efficiency, good optical performance, long lifetime and environmental friendliness. A pulsating current can be used to drive LEDs. However, current with a high peak-to-average ratio is unfavorable for LEDs. A novel control scheme for the ac-dc critical conduction mode (CRM) flyback LED driver is proposed in this paper. By using the input voltage, output voltage and average output current to control the turn-on time of the switch, the peak-to-average ratio of the output current can be reduced. The operation principle is analyzed and an implementation circuit is put forward. Experimental results show the effectiveness of the proposed scheme.

• 전력전자학회논문지
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• 제24권3호
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• pp.207-214
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• 2019

In this study, discrete-time domain analysis is proposed to investigate the input current of a buck AC/DC light-emitting diode (LED) driver. The buck power factor correction converter can operate in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). Two discontinuous and two continuous conduction operating modes are possible depending on which event terminates the conduction of the main switch in a switching cycle. All four operating modes are considered in the discrete-time domain analysis. The peak current-mode control with slope compensation is used to design a low-cost AC/DC LED driver. A slope compensation design of the buck AC/DC LED driver is described on the basis of a discrete-time domain analysis. Experimental results are presented to confirm the usefulness of the proposed analysis.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.337-340
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• 2003

This paper presented practical details about control-loop design and dynamic analysis for a peak current-mode controlled asymmetrical half-bridge(ASHB) do-to-dc converter, Graphical loop gain method is used to design the feedback compensation and analyze the closed-loop performance of ASHB converter. The results of the control design and closed-loop analysis are validated by experiments on a prototype converter.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.599-600
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• 2008

This paper presents a high performance DC-DC boost converter by current-mode control method. As load current change, the converter change PWM/PFM operation automatically. current-mode DC-DC boost converter is implemented in a standard $0.35{\mu}m$ CMOS process. The peak efficiency was 94 % with a switching frequency of 1.2MHz.

• 전력전자학회논문지
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• 제19권3호
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• pp.220-226
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• 2014

Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

• 전기학회논문지
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• 제61권3호
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• pp.394-400
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• 2012

In this paper, charging modes of series resonant converter for a high voltage energy storage capacitor are compared in terms of charging time, peak resonant current, normalized peak resonant current and voltage in each operation mode. Operating principles of the full bridge series resonant converter with capacitor load are explained and analyzed in discontinuous and continuous operation mode. Based on the analysis and simulation result, $0.6{\omega}_r$ < ${\omega}_s$ < $0.75{\omega}_r$ and $1.3{\omega}_r$ < ${\omega}_s$ < $1.4{\omega}_r$ are evaluated to the best range of switching frequency for charging of an high voltage energy storage capacitor. 1.8 kJ/s SRC prototype is assembled with TI 28335 DSP controller and 40 kJ, 7 kV energy storage capacitor. Design rules based on the comparative analysis are verified by experiment.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.512-512
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• 2000

In this article, a current mode peak detector circuit is presented. The simple circuit configuration comprises four MOS transistors and one external capacitor. The realization method is suitable fur fabrication using CMOS technology and all transistors are operated in their saturation region. The proposed circuit exhibits a very low drop rate and provides high accuracy, high-speed and wide dynamic range. The proposed circuit has very low power dissipation and operates using a single 2.5V supply. Simulation results confirmed the characteristic of the proposed circuit are also included.

• 대한전자공학회논문지SD
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• 제43권11호
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• pp.98-104
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• 2006

기존의 버스트 모드 자동전력제어 회로는 저 전력과 단일 칩화에 적합한 효율적인 구조인 반면에 데이터 율(data rate)이 높아짐에 따라 영의 밀도(zero density) 영향을 심하게 받아 에러를 야기하였다. 본 논문에서는 더블 게이트 MOS와 MOS다이오드를 이용하여 주입전류의 불균형을 보상하는 할 수 있는 새로운 구조의 첨두 비교기를 고안하고 이를 자동전력제어 회로에 적용하여 높은 데이터 율에서도 영의 밀도 변화에 강한 버스트 모드 자동전력제어 회로를 제안하였다. 제안한 자동전력제어 회로 내의 첨두 비교기는 높은 데이터 율에서 영의 밀도 변화에도 불구하고 정확한 전류비교 기준점을 견지하며 에러 없이 정상동작 하였다. 또한 제안한 첨두 비교기는 저전력 구조이고 대용량의 커패시터가 사용되지 않아 단일 칩화에도 적합하였다.

• 전력전자학회논문지
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• 제23권2호
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• pp.147-151
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• 2018

Phase-shift fullbridge (PSFB) converter detects the current in the primary side for operation of the peak current mode controller (PCMC). The PCMC must used the slope compensation to solve the problem when the effective duty is over 0.5. The voltage response of PSFB converters has slower than that of buck converter because of slew interval even if the voltage controllers of two converters have same bandwidth. To overcome these problems, this work proposes a compensating method of current reference considering slew interval and fast response in the PSFB converter. The effectiveness of the proposed method is proven using the PSIM simulation and experiment.